30be665e82
This is the last step in getting constant pattern matchers to allow undef elements in constant vectors. I'm adding a dedicated m_ZeroInt() function and building m_Zero() from that. In most cases, calling code can be updated to use m_ZeroInt() directly when there's no need to match pointers, but I'm leaving that efficiency optimization as a follow-up step because it's not always clear when that's ok. There are just enough icmp folds in InstSimplify that can be used for integer or pointer types, that we probably still want a generic m_Zero() for those cases. Otherwise, we could eliminate it (and possibly add a m_NullPtr() as an alias for isa<ConstantPointerNull>()). We're conservatively returning a full zero vector (zeroinitializer) in InstSimplify/InstCombine on some of these folds (see diffs in InstSimplify), but I'm not sure if that's actually necessary in all cases. We may be able to propagate an undef lane instead. One test where this happens is marked with 'TODO'. llvm-svn: 330550
291 lines
7.3 KiB
LLVM
291 lines
7.3 KiB
LLVM
; NOTE: Assertions have been autogenerated by utils/update_test_checks.py
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; RUN: opt < %s -instsimplify -S | FileCheck %s
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define i32 @zero_dividend(i32 %A) {
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; CHECK-LABEL: @zero_dividend(
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; CHECK-NEXT: ret i32 0
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;
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%B = urem i32 0, %A
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ret i32 %B
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}
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define <2 x i32> @zero_dividend_vector(<2 x i32> %A) {
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; CHECK-LABEL: @zero_dividend_vector(
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; CHECK-NEXT: ret <2 x i32> zeroinitializer
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;
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%B = srem <2 x i32> zeroinitializer, %A
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ret <2 x i32> %B
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}
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define <2 x i32> @zero_dividend_vector_undef_elt(<2 x i32> %A) {
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; CHECK-LABEL: @zero_dividend_vector_undef_elt(
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; CHECK-NEXT: ret <2 x i32> zeroinitializer
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;
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%B = urem <2 x i32> <i32 undef, i32 0>, %A
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ret <2 x i32> %B
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}
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; Division-by-zero is undef. UB in any vector lane means the whole op is undef.
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define <2 x i8> @srem_zero_elt_vec_constfold(<2 x i8> %x) {
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; CHECK-LABEL: @srem_zero_elt_vec_constfold(
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; CHECK-NEXT: ret <2 x i8> undef
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;
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%rem = srem <2 x i8> <i8 1, i8 2>, <i8 0, i8 -42>
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ret <2 x i8> %rem
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}
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define <2 x i8> @urem_zero_elt_vec_constfold(<2 x i8> %x) {
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; CHECK-LABEL: @urem_zero_elt_vec_constfold(
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; CHECK-NEXT: ret <2 x i8> undef
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;
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%rem = urem <2 x i8> <i8 1, i8 2>, <i8 42, i8 0>
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ret <2 x i8> %rem
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}
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define <2 x i8> @srem_zero_elt_vec(<2 x i8> %x) {
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; CHECK-LABEL: @srem_zero_elt_vec(
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; CHECK-NEXT: ret <2 x i8> undef
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;
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%rem = srem <2 x i8> %x, <i8 -42, i8 0>
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ret <2 x i8> %rem
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}
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define <2 x i8> @urem_zero_elt_vec(<2 x i8> %x) {
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; CHECK-LABEL: @urem_zero_elt_vec(
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; CHECK-NEXT: ret <2 x i8> undef
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;
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%rem = urem <2 x i8> %x, <i8 0, i8 42>
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ret <2 x i8> %rem
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}
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define <2 x i8> @srem_undef_elt_vec(<2 x i8> %x) {
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; CHECK-LABEL: @srem_undef_elt_vec(
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; CHECK-NEXT: ret <2 x i8> undef
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;
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%rem = srem <2 x i8> %x, <i8 -42, i8 undef>
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ret <2 x i8> %rem
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}
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define <2 x i8> @urem_undef_elt_vec(<2 x i8> %x) {
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; CHECK-LABEL: @urem_undef_elt_vec(
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; CHECK-NEXT: ret <2 x i8> undef
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;
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%rem = urem <2 x i8> %x, <i8 undef, i8 42>
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ret <2 x i8> %rem
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}
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; Division-by-zero is undef. UB in any vector lane means the whole op is undef.
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; Thus, we can simplify this: if any element of 'y' is 0, we can do anything.
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; Therefore, assume that all elements of 'y' must be 1.
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define <2 x i1> @srem_bool_vec(<2 x i1> %x, <2 x i1> %y) {
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; CHECK-LABEL: @srem_bool_vec(
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; CHECK-NEXT: ret <2 x i1> zeroinitializer
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;
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%rem = srem <2 x i1> %x, %y
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ret <2 x i1> %rem
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}
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define <2 x i1> @urem_bool_vec(<2 x i1> %x, <2 x i1> %y) {
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; CHECK-LABEL: @urem_bool_vec(
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; CHECK-NEXT: ret <2 x i1> zeroinitializer
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;
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%rem = urem <2 x i1> %x, %y
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ret <2 x i1> %rem
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}
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define i32 @select1(i32 %x, i1 %b) {
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; CHECK-LABEL: @select1(
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; CHECK-NEXT: ret i32 0
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;
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%rhs = select i1 %b, i32 %x, i32 1
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%rem = srem i32 %x, %rhs
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ret i32 %rem
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}
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define i32 @select2(i32 %x, i1 %b) {
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; CHECK-LABEL: @select2(
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; CHECK-NEXT: ret i32 0
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;
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%rhs = select i1 %b, i32 %x, i32 1
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%rem = urem i32 %x, %rhs
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ret i32 %rem
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}
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define i32 @rem1(i32 %x, i32 %n) {
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; CHECK-LABEL: @rem1(
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; CHECK-NEXT: [[MOD:%.*]] = srem i32 [[X:%.*]], [[N:%.*]]
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; CHECK-NEXT: ret i32 [[MOD]]
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;
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%mod = srem i32 %x, %n
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%mod1 = srem i32 %mod, %n
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ret i32 %mod1
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}
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define i32 @rem2(i32 %x, i32 %n) {
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; CHECK-LABEL: @rem2(
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; CHECK-NEXT: [[MOD:%.*]] = urem i32 [[X:%.*]], [[N:%.*]]
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; CHECK-NEXT: ret i32 [[MOD]]
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;
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%mod = urem i32 %x, %n
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%mod1 = urem i32 %mod, %n
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ret i32 %mod1
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}
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define i32 @rem3(i32 %x, i32 %n) {
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; CHECK-LABEL: @rem3(
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; CHECK-NEXT: [[MOD:%.*]] = srem i32 [[X:%.*]], [[N:%.*]]
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; CHECK-NEXT: [[MOD1:%.*]] = urem i32 [[MOD]], [[N]]
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; CHECK-NEXT: ret i32 [[MOD1]]
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;
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%mod = srem i32 %x, %n
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%mod1 = urem i32 %mod, %n
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ret i32 %mod1
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}
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define i32 @urem_dividend_known_smaller_than_constant_divisor(i32 %x) {
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; CHECK-LABEL: @urem_dividend_known_smaller_than_constant_divisor(
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; CHECK-NEXT: [[AND:%.*]] = and i32 [[X:%.*]], 250
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; CHECK-NEXT: ret i32 [[AND]]
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;
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%and = and i32 %x, 250
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%r = urem i32 %and, 251
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ret i32 %r
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}
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define i32 @not_urem_dividend_known_smaller_than_constant_divisor(i32 %x) {
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; CHECK-LABEL: @not_urem_dividend_known_smaller_than_constant_divisor(
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; CHECK-NEXT: [[AND:%.*]] = and i32 [[X:%.*]], 251
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; CHECK-NEXT: [[R:%.*]] = urem i32 [[AND]], 251
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; CHECK-NEXT: ret i32 [[R]]
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;
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%and = and i32 %x, 251
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%r = urem i32 %and, 251
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ret i32 %r
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}
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define i32 @urem_constant_dividend_known_smaller_than_divisor(i32 %x) {
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; CHECK-LABEL: @urem_constant_dividend_known_smaller_than_divisor(
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; CHECK-NEXT: ret i32 250
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;
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%or = or i32 %x, 251
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%r = urem i32 250, %or
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ret i32 %r
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}
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define i32 @not_urem_constant_dividend_known_smaller_than_divisor(i32 %x) {
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; CHECK-LABEL: @not_urem_constant_dividend_known_smaller_than_divisor(
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; CHECK-NEXT: [[OR:%.*]] = or i32 [[X:%.*]], 251
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; CHECK-NEXT: [[R:%.*]] = urem i32 251, [[OR]]
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; CHECK-NEXT: ret i32 [[R]]
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;
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%or = or i32 %x, 251
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%r = urem i32 251, %or
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ret i32 %r
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}
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; This would require computing known bits on both x and y. Is it worth doing?
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define i32 @urem_dividend_known_smaller_than_divisor(i32 %x, i32 %y) {
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; CHECK-LABEL: @urem_dividend_known_smaller_than_divisor(
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; CHECK-NEXT: [[AND:%.*]] = and i32 [[X:%.*]], 250
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; CHECK-NEXT: [[OR:%.*]] = or i32 [[Y:%.*]], 251
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; CHECK-NEXT: [[R:%.*]] = urem i32 [[AND]], [[OR]]
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; CHECK-NEXT: ret i32 [[R]]
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;
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%and = and i32 %x, 250
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%or = or i32 %y, 251
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%r = urem i32 %and, %or
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ret i32 %r
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}
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define i32 @not_urem_dividend_known_smaller_than_divisor(i32 %x, i32 %y) {
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; CHECK-LABEL: @not_urem_dividend_known_smaller_than_divisor(
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; CHECK-NEXT: [[AND:%.*]] = and i32 [[X:%.*]], 251
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; CHECK-NEXT: [[OR:%.*]] = or i32 [[Y:%.*]], 251
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; CHECK-NEXT: [[R:%.*]] = urem i32 [[AND]], [[OR]]
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; CHECK-NEXT: ret i32 [[R]]
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;
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%and = and i32 %x, 251
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%or = or i32 %y, 251
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%r = urem i32 %and, %or
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ret i32 %r
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}
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declare i32 @external()
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define i32 @rem4() {
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; CHECK-LABEL: @rem4(
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; CHECK-NEXT: [[CALL:%.*]] = call i32 @external(), !range !0
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; CHECK-NEXT: ret i32 [[CALL]]
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;
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%call = call i32 @external(), !range !0
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%urem = urem i32 %call, 3
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ret i32 %urem
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}
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!0 = !{i32 0, i32 3}
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define i32 @rem5(i32 %x, i32 %y) {
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; CHECK-LABEL: @rem5(
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; CHECK-NEXT: ret i32 0
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;
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%shl = shl nsw i32 %x, %y
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%mod = srem i32 %shl, %x
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ret i32 %mod
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}
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define <2 x i32> @rem6(<2 x i32> %x, <2 x i32> %y) {
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; CHECK-LABEL: @rem6(
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; CHECK-NEXT: ret <2 x i32> zeroinitializer
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;
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%shl = shl nsw <2 x i32> %x, %y
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%mod = srem <2 x i32> %shl, %x
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ret <2 x i32> %mod
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}
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; make sure the previous fold doesn't take place for wrapped shifts
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define i32 @rem7(i32 %x, i32 %y) {
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; CHECK-LABEL: @rem7(
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; CHECK-NEXT: [[SHL:%.*]] = shl i32 [[X:%.*]], [[Y:%.*]]
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; CHECK-NEXT: [[MOD:%.*]] = srem i32 [[SHL]], [[X]]
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; CHECK-NEXT: ret i32 [[MOD]]
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;
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%shl = shl i32 %x, %y
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%mod = srem i32 %shl, %x
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ret i32 %mod
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}
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define i32 @rem8(i32 %x, i32 %y) {
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; CHECK-LABEL: @rem8(
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; CHECK-NEXT: ret i32 0
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;
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%shl = shl nuw i32 %x, %y
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%mod = urem i32 %shl, %x
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ret i32 %mod
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}
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define <2 x i32> @rem9(<2 x i32> %x, <2 x i32> %y) {
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; CHECK-LABEL: @rem9(
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; CHECK-NEXT: ret <2 x i32> zeroinitializer
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;
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%shl = shl nuw <2 x i32> %x, %y
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%mod = urem <2 x i32> %shl, %x
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ret <2 x i32> %mod
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}
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; make sure the previous fold doesn't take place for wrapped shifts
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define i32 @rem10(i32 %x, i32 %y) {
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; CHECK-LABEL: @rem10(
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; CHECK-NEXT: [[SHL:%.*]] = shl i32 [[X:%.*]], [[Y:%.*]]
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; CHECK-NEXT: [[MOD:%.*]] = urem i32 [[SHL]], [[X]]
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; CHECK-NEXT: ret i32 [[MOD]]
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;
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%shl = shl i32 %x, %y
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%mod = urem i32 %shl, %x
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ret i32 %mod
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}
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