Matt Arsenault cbda7ff4ae AMDGPU: Fix crash when constant folding with physreg operand ...

llvm-svn: 327209

2018-03-10 16:05:35 +00:00

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AArch64

Clean up a temp file on the buildbots.

2018-03-10 02:51:10 +00:00

AMDGPU

AMDGPU: Fix crash when constant folding with physreg operand

2018-03-10 16:05:35 +00:00

ARC

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ARM

[ARM] Fix for PR36577

2018-03-07 09:10:44 +00:00

AVR

[AVR] Remove the earlyclobber flag from LDDWRdYQ

2018-03-06 11:20:25 +00:00

BPF

bpf: New codegen testcases for 32-bit subregister support

2018-02-23 23:49:33 +00:00

Generic

Revert "Reapply "[DWARFv5] Emit file 0 to the line table.""

2018-03-07 16:27:44 +00:00

Hexagon

[Hexagon] Ignore indexed loads when handling unaligned loads

2018-03-08 18:15:13 +00:00

Inputs

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Lanai

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Mips

[TLS] use emulated TLS if the target supports only this mode

2018-02-28 17:48:55 +00:00

MIR

[MIRParser] Accept overloaded intrinsic names w/o type suffixes

2018-02-28 23:51:49 +00:00

MSP430

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Nios2

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NVPTX

[DAGCombiner] When combining zero_extend of a truncate, only mask before extending for vectors.

2018-03-01 22:32:25 +00:00

PowerPC

Revert "[PowerPC] Move test to correct location."

2018-03-09 16:08:48 +00:00

RISCV

[RISCV] Update two tests after r326208

2018-02-28 08:20:47 +00:00

SPARC

Re-enable "[MachineCopyPropagation] Extend pass to do COPY source forwarding"

2018-02-27 16:59:10 +00:00

SystemZ

[SystemZ] Fix test cases after r326613

2018-03-02 21:22:42 +00:00

Thumb

[ARM] Fix access to stack arguments when re-aligning SP in Armv6m

2018-03-02 15:47:14 +00:00

Thumb2

ARM: Don't rewrite add reg, $sp, 0 -> mov reg, $sp if the add defines CPSR.

2018-02-27 19:00:59 +00:00

WebAssembly

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WinCFGuard

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WinEH

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X86

[X86] Rewrite printMasking code in X86InstComments to use TSFlags to determine whether the instruction is masked.

2018-03-10 03:12:00 +00:00

XCore

[XCore] Return true in enableMultipleCopyHints().

2018-02-26 08:03:32 +00:00