For instructions in uniform set, they will not have vector versions so add them to VecValuesToIgnore. For induction vars, those only used in uniform instructions or consecutive ptrs instructions have already been added to VecValuesToIgnore above. For those induction vars which are only used in uniform instructions or non-consecutive/non-gather scatter ptr instructions, the related phi and update will also be added into VecValuesToIgnore set. The change will make the vector RegUsages estimation less conservative. Differential Revision: https://reviews.llvm.org/D20474 The recommit fixed the testcase global_alias.ll. llvm-svn: 275936
36 lines
1.2 KiB
LLVM
36 lines
1.2 KiB
LLVM
; RUN: opt -mattr=+avx512f --loop-vectorize -S < %s | llc -mattr=+avx512f | FileCheck %s
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target datalayout = "e-m:o-i64:64-f80:128-n8:16:32:64-S128"
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target triple = "x86_64-apple-macosx10.9.0"
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; Verify that we generate 512-bit wide vectors for a basic integer memset
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; loop.
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; CHECK-LABEL: f:
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; CHECK: vmovdqu32 %zmm{{.}},
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; CHECK-NOT: %ymm
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define void @f(i32* %a, i32 %n) {
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entry:
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%cmp4 = icmp sgt i32 %n, 0
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br i1 %cmp4, label %for.body.preheader, label %for.end
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for.body.preheader: ; preds = %entry
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br label %for.body
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for.body: ; preds = %for.body.preheader, %for.body
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%indvars.iv = phi i64 [ %indvars.iv.next, %for.body ], [ 0, %for.body.preheader ]
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%arrayidx = getelementptr inbounds i32, i32* %a, i64 %indvars.iv
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store i32 %n, i32* %arrayidx, align 4
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%indvars.iv.next = add nuw nsw i64 %indvars.iv, 1
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%lftr.wideiv = trunc i64 %indvars.iv.next to i32
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%exitcond = icmp eq i32 %lftr.wideiv, %n
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br i1 %exitcond, label %for.end.loopexit, label %for.body
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for.end.loopexit: ; preds = %for.body
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br label %for.end
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for.end: ; preds = %for.end.loopexit, %entry
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ret void
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}
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