b96d3b2dd8
Add support for the new pass manager to MemorySSA pass. Change MemorySSA to be computed eagerly upon construction. Change MemorySSAWalker to be owned by the MemorySSA object that creates it. Reviewers: dberlin, george.burgess.iv Subscribers: mcrosier, llvm-commits Differential Revision: http://reviews.llvm.org/D19664 llvm-svn: 271432
68 lines
1.5 KiB
LLVM
68 lines
1.5 KiB
LLVM
; RUN: opt -basicaa -memoryssa -analyze < %s 2>&1 | FileCheck %s
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; RUN: opt -aa-pipeline=basic-aa -passes='print<memoryssa>,verify<memoryssa>' -disable-output < %s 2>&1 | FileCheck %s
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;
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; Testing many dominators, specifically from a switch statement in C.
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declare i1 @getBool() readnone
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define i32 @foo(i32* %p) {
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entry:
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br label %loopbegin
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loopbegin:
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; CHECK: 8 = MemoryPhi({entry,liveOnEntry},{sw.epilog,6})
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; CHECK-NEXT: %n =
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%n = phi i32 [ 0, %entry ], [ %1, %sw.epilog ]
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%m = alloca i32, align 4
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switch i32 %n, label %sw.default [
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i32 0, label %sw.bb
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i32 1, label %sw.bb1
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i32 2, label %sw.bb2
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i32 3, label %sw.bb3
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]
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sw.bb:
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; CHECK: 1 = MemoryDef(8)
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; CHECK-NEXT: store i32 1
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store i32 1, i32* %m, align 4
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br label %sw.epilog
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sw.bb1:
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; CHECK: 2 = MemoryDef(8)
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; CHECK-NEXT: store i32 2
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store i32 2, i32* %m, align 4
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br label %sw.epilog
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sw.bb2:
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; CHECK: 3 = MemoryDef(8)
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; CHECK-NEXT: store i32 3
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store i32 3, i32* %m, align 4
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br label %sw.epilog
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sw.bb3:
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; CHECK: 4 = MemoryDef(8)
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; CHECK-NEXT: store i32 4
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store i32 4, i32* %m, align 4
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br label %sw.epilog
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sw.default:
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; CHECK: 5 = MemoryDef(8)
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; CHECK-NEXT: store i32 5
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store i32 5, i32* %m, align 4
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br label %sw.epilog
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sw.epilog:
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; CHECK: 7 = MemoryPhi({sw.default,5},{sw.bb,1},{sw.bb1,2},{sw.bb2,3},{sw.bb3,4})
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; CHECK-NEXT: MemoryUse(7)
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; CHECK-NEXT: %0 =
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%0 = load i32, i32* %m, align 4
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; CHECK: 6 = MemoryDef(7)
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; CHECK-NEXT: %1 =
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%1 = load volatile i32, i32* %p, align 4
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%2 = icmp eq i32 %0, %1
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br i1 %2, label %exit, label %loopbegin
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exit:
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ret i32 %1
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}
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