f4ee371e60
These flags are now always passed to all tests and need to be disabled if not needed. Disabling these flags, rather than passing them to almost all tests, significantly simplfies our RUN: lines. llvm-svn: 249422
52 lines
1.4 KiB
LLVM
52 lines
1.4 KiB
LLVM
; RUN: opt %loadPolly -polly-ast -polly-parallel -analyze < %s | FileCheck %s
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target datalayout = "e-p:64:64:64-i1:8:8-i8:8:8-i16:16:16-i32:32:32-i64:64:64-f32:32:32-f64:64:64-v64:64:64-v128:128:128-a0:0:64-s0:64:64-f80:128:128-n8:16:32:64"
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; for (i = 0; i < 1024; i++)
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; for (j = 0; j < 1024; j++)
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; A[i][j] = 1;
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@A = common global [1024 x [1024 x i32]] zeroinitializer
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define void @bar() {
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start:
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fence seq_cst
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br label %loop.i
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loop.i:
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%i = phi i64 [ 0, %start ], [ %i.next, %loop.i.backedge ]
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%exitcond.i = icmp ne i64 %i, 1024
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br i1 %exitcond.i, label %loop.j, label %ret
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loop.j:
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%j = phi i64 [ 0, %loop.i], [ %j.next, %loop.j.backedge ]
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%exitcond.j = icmp ne i64 %j, 1024
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br i1 %exitcond.j, label %loop.body, label %loop.i.backedge
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loop.body:
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%scevgep = getelementptr [1024 x [1024 x i32] ], [1024 x [1024 x i32] ]* @A, i64 0, i64 %j, i64 %i
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store i32 1, i32* %scevgep
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br label %loop.j.backedge
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loop.j.backedge:
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%j.next = add nsw i64 %j, 1
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br label %loop.j
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loop.i.backedge:
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%i.next = add nsw i64 %i, 1
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br label %loop.i
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ret:
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fence seq_cst
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ret void
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}
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; Make sure we do not accidentally generate nested openmp parallel for
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; annotations.
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; CHECK: #pragma omp parallel for
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; CHECK: for (int c0 = 0; c0 <= 1023; c0 += 1)
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; CHECK-NOT: #pragma omp parallel for
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; CHECK: #pragma simd
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; CHECK-NOT: #pragma omp parallel for
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; CHECK: for (int c1 = 0; c1 <= 1023; c1 += 1)
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; CHECK: Stmt_loop_body(c0, c1);
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