597086c609
Needs an AMDGPU hack to get the selection to work. The ordinary variant is custom lowered through an almost equivalent target node that would need a strict variant for additional known bits optimizations.
111 lines
5.0 KiB
LLVM
111 lines
5.0 KiB
LLVM
; NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py UTC_ARGS: --version 4
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; RUN: llc -mtriple=amdgcn-mesa-mesa3d -mcpu=hawaii < %s | FileCheck -check-prefixes=GFX7 %s
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declare float @llvm.experimental.constrained.fpext.f32.f16(half, metadata) #0
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declare <2 x float> @llvm.experimental.constrained.fpext.v2f32.v2f16(<2 x half>, metadata) #0
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declare half @llvm.experimental.constrained.fptrunc.f16.f32(float, metadata, metadata) #0
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declare <2 x half> @llvm.experimental.constrained.fptrunc.v2f16.v2f32(<2 x float>, metadata, metadata) #0
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declare float @llvm.fabs.f32(float)
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define float @v_constrained_fpext_f16_to_f32(ptr addrspace(1) %ptr) #0 {
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; GFX7-LABEL: v_constrained_fpext_f16_to_f32:
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; GFX7: ; %bb.0:
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; GFX7-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)
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; GFX7-NEXT: s_mov_b32 s6, 0
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; GFX7-NEXT: s_mov_b32 s7, 0xf000
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; GFX7-NEXT: s_mov_b32 s4, s6
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; GFX7-NEXT: s_mov_b32 s5, s6
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; GFX7-NEXT: buffer_load_ushort v0, v[0:1], s[4:7], 0 addr64
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; GFX7-NEXT: s_waitcnt vmcnt(0)
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; GFX7-NEXT: v_cvt_f32_f16_e32 v0, v0
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; GFX7-NEXT: s_setpc_b64 s[30:31]
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%val = load half, ptr addrspace(1) %ptr
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%result = call float @llvm.experimental.constrained.fpext.f32.f16(half %val, metadata !"fpexcept.strict")
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ret float %result
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}
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define <2 x float> @v_constrained_fpext_v2f16_to_v2f32(ptr addrspace(1) %ptr) #0 {
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; GFX7-LABEL: v_constrained_fpext_v2f16_to_v2f32:
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; GFX7: ; %bb.0:
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; GFX7-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)
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; GFX7-NEXT: s_mov_b32 s6, 0
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; GFX7-NEXT: s_mov_b32 s7, 0xf000
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; GFX7-NEXT: s_mov_b32 s4, s6
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; GFX7-NEXT: s_mov_b32 s5, s6
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; GFX7-NEXT: buffer_load_dword v1, v[0:1], s[4:7], 0 addr64
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; GFX7-NEXT: s_waitcnt vmcnt(0)
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; GFX7-NEXT: v_cvt_f32_f16_e32 v0, v1
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; GFX7-NEXT: v_lshrrev_b32_e32 v1, 16, v1
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; GFX7-NEXT: v_cvt_f32_f16_e32 v1, v1
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; GFX7-NEXT: s_setpc_b64 s[30:31]
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%val = load <2 x half>, ptr addrspace(1) %ptr
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%result = call <2 x float> @llvm.experimental.constrained.fpext.v2f32.v2f16(<2 x half> %val, metadata !"fpexcept.strict")
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ret <2 x float> %result
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}
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define void @v_constrained_fptrunc_f32_to_f16_fpexcept_strict(float %arg, ptr addrspace(1) %ptr) #0 {
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; GFX7-LABEL: v_constrained_fptrunc_f32_to_f16_fpexcept_strict:
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; GFX7: ; %bb.0:
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; GFX7-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)
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; GFX7-NEXT: v_cvt_f16_f32_e32 v0, v0
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; GFX7-NEXT: v_and_b32_e32 v0, 0xffff, v0
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; GFX7-NEXT: v_cvt_f32_f16_e32 v0, v0
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; GFX7-NEXT: s_setpc_b64 s[30:31]
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%result = call half @llvm.experimental.constrained.fptrunc.f16.f32(float %arg, metadata !"round.tonearest", metadata !"fpexcept.strict")
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ret void
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}
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define void @v_constrained_fptrunc_v2f32_to_v2f16_fpexcept_strict(<2 x float> %arg, ptr addrspace(1) %ptr) #0 {
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; GFX7-LABEL: v_constrained_fptrunc_v2f32_to_v2f16_fpexcept_strict:
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; GFX7: ; %bb.0:
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; GFX7-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)
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; GFX7-NEXT: v_cvt_f16_f32_e32 v1, v1
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; GFX7-NEXT: v_cvt_f16_f32_e32 v0, v0
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; GFX7-NEXT: s_mov_b32 s6, 0
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; GFX7-NEXT: s_mov_b32 s7, 0xf000
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; GFX7-NEXT: v_and_b32_e32 v1, 0xffff, v1
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; GFX7-NEXT: v_cvt_f32_f16_e32 v1, v1
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; GFX7-NEXT: v_and_b32_e32 v0, 0xffff, v0
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; GFX7-NEXT: v_cvt_f32_f16_e32 v0, v0
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; GFX7-NEXT: s_mov_b32 s4, s6
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; GFX7-NEXT: v_cvt_f16_f32_e32 v1, v1
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; GFX7-NEXT: s_mov_b32 s5, s6
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; GFX7-NEXT: v_cvt_f16_f32_e32 v0, v0
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; GFX7-NEXT: v_lshlrev_b32_e32 v1, 16, v1
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; GFX7-NEXT: v_or_b32_e32 v0, v0, v1
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; GFX7-NEXT: buffer_store_dword v0, v[2:3], s[4:7], 0 addr64
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; GFX7-NEXT: s_waitcnt vmcnt(0)
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; GFX7-NEXT: s_setpc_b64 s[30:31]
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%result = call <2 x half> @llvm.experimental.constrained.fptrunc.v2f16.v2f32(<2 x float> %arg, metadata !"round.tonearest", metadata !"fpexcept.strict")
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store <2 x half> %result, ptr addrspace(1) %ptr
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ret void
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}
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define void @v_constrained_fptrunc_f32_to_f16_fpexcept_strict_fneg(float %arg, ptr addrspace(1) %ptr) #0 {
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; GFX7-LABEL: v_constrained_fptrunc_f32_to_f16_fpexcept_strict_fneg:
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; GFX7: ; %bb.0:
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; GFX7-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)
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; GFX7-NEXT: v_cvt_f16_f32_e64 v0, -v0
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; GFX7-NEXT: v_and_b32_e32 v0, 0xffff, v0
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; GFX7-NEXT: v_cvt_f32_f16_e32 v0, v0
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; GFX7-NEXT: s_setpc_b64 s[30:31]
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%neg.arg = fneg float %arg
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%result = call half @llvm.experimental.constrained.fptrunc.f16.f32(float %neg.arg, metadata !"round.tonearest", metadata !"fpexcept.strict")
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ret void
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}
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define void @v_constrained_fptrunc_f32_to_f16_fpexcept_strict_fabs(float %arg, ptr addrspace(1) %ptr) #0 {
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; GFX7-LABEL: v_constrained_fptrunc_f32_to_f16_fpexcept_strict_fabs:
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; GFX7: ; %bb.0:
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; GFX7-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)
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; GFX7-NEXT: v_cvt_f16_f32_e64 v0, |v0|
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; GFX7-NEXT: v_and_b32_e32 v0, 0xffff, v0
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; GFX7-NEXT: v_cvt_f32_f16_e32 v0, v0
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; GFX7-NEXT: s_setpc_b64 s[30:31]
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%abs.arg = call float @llvm.fabs.f32(float %arg)
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%result = call half @llvm.experimental.constrained.fptrunc.f16.f32(float %abs.arg, metadata !"round.tonearest", metadata !"fpexcept.strict")
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ret void
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}
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attributes #0 = { strictfp }
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