18ed279a3a
Tablegen definitions for subtarget features and cpp predicate functions to access the features. New Sub-TargetProcessors and common latencies. Simple changes to MIR codegen tests which pass on gfx11 because they have the same output as previous subtargets or operate on pseudo instructions which are reused from previous subtargets. Contributors: Jay Foad <jay.foad@amd.com> Petar Avramovic <Petar.Avramovic@amd.com> Patch 4/N for upstreaming of AMDGPU gfx11 architecture Depends on D124538 Reviewed By: Petar.Avramovic, foad Differential Revision: https://reviews.llvm.org/D125261
655 lines
15 KiB
YAML
655 lines
15 KiB
YAML
# RUN: llc -march=amdgcn -mcpu=fiji -run-pass si-pre-emit-peephole -verify-machineinstrs -o - %s | FileCheck -check-prefix=GCN %s
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# RUN: llc -march=amdgcn -mcpu=gfx1010 -run-pass si-pre-emit-peephole -verify-machineinstrs -o - %s | FileCheck -check-prefix=W32 %s
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# RUN: llc -march=amdgcn -mcpu=gfx1100 -run-pass si-pre-emit-peephole -verify-machineinstrs -o - %s | FileCheck -check-prefix=W32 %s
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---
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# GCN-LABEL: name: and_execz_mov_vccz
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# GCN-NOT: S_MOV_
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# GCN-NOT: S_AND_
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# GCN: S_CBRANCH_EXECZ %bb.1, implicit $exec
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name: and_execz_mov_vccz
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body: |
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bb.0:
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S_NOP 0
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bb.1:
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S_NOP 0
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bb.2:
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$sgpr0_sgpr1 = S_MOV_B64 -1
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$vcc = S_AND_B64 $exec, killed $sgpr0_sgpr1, implicit-def dead $scc
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S_CBRANCH_VCCZ %bb.1, implicit killed $vcc
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S_ENDPGM 0
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...
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---
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# GCN-LABEL: name: and_execz_imm_vccz
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# GCN-NOT: S_AND_
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# GCN: S_CBRANCH_EXECZ %bb.1, implicit $exec
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name: and_execz_imm_vccz
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body: |
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bb.0:
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S_NOP 0
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bb.1:
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S_NOP 0
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bb.2:
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$vcc = S_AND_B64 $exec, -1, implicit-def dead $scc
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S_CBRANCH_VCCZ %bb.1, implicit killed $vcc
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S_ENDPGM 0
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...
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---
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# GCN-LABEL: name: and_execnz_imm_vccnz
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# GCN-NOT: S_AND_
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# GCN: S_CBRANCH_EXECNZ %bb.1, implicit $exec
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name: and_execnz_imm_vccnz
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body: |
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bb.0:
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S_NOP 0
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bb.1:
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S_NOP 0
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bb.2:
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$vcc = S_AND_B64 $exec, -1, implicit-def dead $scc
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S_CBRANCH_VCCNZ %bb.1, implicit killed $vcc
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S_ENDPGM 0
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...
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---
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# GCN-LABEL: name: and_execz_imm_vccz_live_scc
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# GCN: $vcc = S_AND_B64 $exec, -1, implicit-def $scc
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# GCN: S_CBRANCH_EXECZ %bb.1, implicit $exec
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name: and_execz_imm_vccz_live_scc
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body: |
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bb.0:
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S_NOP 0
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bb.1:
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S_NOP 0
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bb.2:
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$vcc = S_AND_B64 $exec, -1, implicit-def $scc
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S_CBRANCH_VCCZ %bb.1, implicit killed $vcc
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S_ENDPGM 0
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...
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---
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# GCN-LABEL: name: and_execz_mov_vccz_live_scc
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# GCN-NOT: S_MOV_
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# GCN: $vcc = S_AND_B64 $exec, -1, implicit-def $scc
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# GCN: S_CBRANCH_EXECZ %bb.1, implicit $exec
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name: and_execz_mov_vccz_live_scc
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body: |
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bb.0:
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S_NOP 0
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bb.1:
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S_NOP 0
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bb.2:
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$sgpr0_sgpr1 = S_MOV_B64 -1
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$vcc = S_AND_B64 $exec, killed $sgpr0_sgpr1, implicit-def $scc
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S_CBRANCH_VCCZ %bb.1, implicit killed $vcc
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S_ENDPGM 0
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...
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---
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# GCN-LABEL: name: and_execz_mov_vccz_live_sreg
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# GCN: $sgpr0_sgpr1 = S_MOV_B64 -1
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# GCN-NEXT: S_CBRANCH_EXECZ %bb.1, implicit $exec
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name: and_execz_mov_vccz_live_sreg
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body: |
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bb.0:
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S_NOP 0
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bb.1:
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S_NOP 0
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bb.2:
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$sgpr0_sgpr1 = S_MOV_B64 -1
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$vcc = S_AND_B64 $exec, $sgpr0_sgpr1, implicit-def dead $scc
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S_CBRANCH_VCCZ %bb.1, implicit killed $vcc
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S_ENDPGM 0
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...
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---
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# GCN-LABEL: name: and_execz_mov_vccz_live_sreg_commute
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# GCN: $sgpr0_sgpr1 = S_MOV_B64 -1
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# GCN-NEXT: S_CBRANCH_EXECZ %bb.1, implicit $exec
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name: and_execz_mov_vccz_live_sreg_commute
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body: |
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bb.0:
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S_NOP 0
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bb.1:
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S_NOP 0
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bb.2:
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$sgpr0_sgpr1 = S_MOV_B64 -1
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$vcc = S_AND_B64 $sgpr0_sgpr1, $exec, implicit-def dead $scc
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S_CBRANCH_VCCZ %bb.1, implicit killed $vcc
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S_ENDPGM 0
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...
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---
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# GCN-LABEL: name: and_execz_mov_vccz_live_scc_commute
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# GCN-NOT: S_MOV_
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# GCN: $vcc = S_AND_B64 $exec, -1, implicit-def $scc
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# GCN: S_CBRANCH_EXECZ %bb.1, implicit $exec
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name: and_execz_mov_vccz_live_scc_commute
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body: |
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bb.0:
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S_NOP 0
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bb.1:
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S_NOP 0
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bb.2:
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$sgpr0_sgpr1 = S_MOV_B64 -1
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$vcc = S_AND_B64 killed $sgpr0_sgpr1, $exec, implicit-def $scc
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S_CBRANCH_VCCZ %bb.1, implicit killed $vcc
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S_ENDPGM 0
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...
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---
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# GCN-LABEL: name: and_execz_mov_vccz_commute
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# GCN-NOT: S_MOV_
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# GCN-NOT: S_AND_
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# GCN: S_CBRANCH_EXECZ %bb.1, implicit $exec
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name: and_execz_mov_vccz_commute
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body: |
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bb.0:
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S_NOP 0
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bb.1:
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S_NOP 0
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bb.2:
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$sgpr0_sgpr1 = S_MOV_B64 -1
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$vcc = S_AND_B64 killed $sgpr0_sgpr1, $exec, implicit-def dead $scc
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S_CBRANCH_VCCZ %bb.1, implicit killed $vcc
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S_ENDPGM 0
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...
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---
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# GCN-LABEL: name: and_execz_mov_exec_vccz
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# GCN: $exec = S_MOV_B64 -1
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# GCN-NEXT: S_ENDPGM 0
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name: and_execz_mov_exec_vccz
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body: |
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bb.0:
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S_NOP 0
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bb.1:
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S_NOP 0
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bb.2:
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$exec = S_MOV_B64 -1
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$vcc = S_AND_B64 $exec, $exec, implicit-def dead $scc
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S_CBRANCH_VCCZ %bb.1, implicit killed $vcc
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S_ENDPGM 0
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...
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---
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# GCN-LABEL: name: and_execz_mov_exec_vccnz
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# GCN: $exec = S_MOV_B64 -1
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# GCN-NEXT: S_BRANCH %bb.1{{$}}
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name: and_execz_mov_exec_vccnz
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body: |
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bb.0:
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S_NOP 0
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bb.1:
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S_NOP 0
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bb.2:
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$exec = S_MOV_B64 -1
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$vcc = S_AND_B64 $exec, $exec, implicit-def dead $scc
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S_CBRANCH_VCCNZ %bb.1, implicit killed $vcc
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S_ENDPGM 0
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...
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---
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# GCN-LABEL: name: and_execz_mov_vccz_reads_sreg_early
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# GCN: $sgpr0_sgpr1 = S_MOV_B64 -1
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# GCN-NEXT: $sgpr2 = S_MOV_B32 $sgpr1
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# GCN-NEXT: S_CBRANCH_EXECZ %bb.1, implicit $exec
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name: and_execz_mov_vccz_reads_sreg_early
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body: |
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bb.0:
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S_NOP 0
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bb.1:
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S_NOP 0
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bb.2:
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$sgpr0_sgpr1 = S_MOV_B64 -1
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$sgpr2 = S_MOV_B32 $sgpr1
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$vcc = S_AND_B64 $exec, killed $sgpr0_sgpr1, implicit-def dead $scc
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S_CBRANCH_VCCZ %bb.1, implicit killed $vcc
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S_ENDPGM 0
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...
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---
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# GCN-LABEL: name: and_execz_mov_vccz_reads_sreg_late
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# GCN: $sgpr0_sgpr1 = S_MOV_B64 -1
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# GCN-NEXT: $sgpr2 = S_MOV_B32 $sgpr1
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# GCN-NEXT: S_CBRANCH_EXECZ %bb.1, implicit $exec
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name: and_execz_mov_vccz_reads_sreg_late
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body: |
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bb.0:
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S_NOP 0
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bb.1:
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S_NOP 0
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bb.2:
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$sgpr0_sgpr1 = S_MOV_B64 -1
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$vcc = S_AND_B64 $exec, $sgpr0_sgpr1, implicit-def dead $scc
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$sgpr2 = S_MOV_B32 $sgpr1
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S_CBRANCH_VCCZ %bb.1, implicit killed $vcc
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S_ENDPGM 0
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...
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# GCN-LABEL: name: and_execz_mov_vccz_reads_writes_sreg_early
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# GCN: $sgpr0_sgpr1 = S_MOV_B64 -1
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# GCN-NEXT: $sgpr1 = S_MOV_B32 $sgpr0
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# GCN-NEXT: $vcc = S_AND_B64 $exec, killed $sgpr0_sgpr1, implicit-def dead $scc
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# GCN-NEXT: S_CBRANCH_VCCZ %bb.1, implicit killed $vcc
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name: and_execz_mov_vccz_reads_writes_sreg_early
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body: |
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bb.0:
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S_NOP 0
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bb.1:
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S_NOP 0
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bb.2:
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$sgpr0_sgpr1 = S_MOV_B64 -1
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$sgpr1 = S_MOV_B32 $sgpr0
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$vcc = S_AND_B64 $exec, killed $sgpr0_sgpr1, implicit-def dead $scc
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S_CBRANCH_VCCZ %bb.1, implicit killed $vcc
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S_ENDPGM 0
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...
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---
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# GCN-LABEL: name: and_execz_mov_vccz_reads_cond
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# GCN: $vcc = S_AND_B64 $exec, -1, implicit-def dead $scc
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# GCN-NEXT: $sgpr2 = S_MOV_B32 $vcc_lo
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# GCN-NEXT: S_CBRANCH_EXECZ %bb.1, implicit $exec
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name: and_execz_mov_vccz_reads_cond
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body: |
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bb.0:
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S_NOP 0
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bb.1:
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S_NOP 0
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bb.2:
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$sgpr0_sgpr1 = S_MOV_B64 -1
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$vcc = S_AND_B64 $exec, killed $sgpr0_sgpr1, implicit-def dead $scc
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$sgpr2 = S_MOV_B32 $vcc_lo
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S_CBRANCH_VCCZ %bb.1, implicit killed $vcc
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S_ENDPGM 0
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...
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---
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# GCN-LABEL: name: and_execz_mov_vccz_modifies_sreg
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# GCN: $sgpr0_sgpr1 = S_MOV_B64 -1
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# GCN-NEXT: $sgpr0 = S_MOV_B32 0
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# GCN-NEXT: $vcc = S_AND_B64 $exec, killed $sgpr0_sgpr1, implicit-def dead $scc
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# GCN-NEXT: S_CBRANCH_VCCZ %bb.1, implicit killed $vcc
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name: and_execz_mov_vccz_modifies_sreg
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body: |
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bb.0:
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S_NOP 0
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bb.1:
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S_NOP 0
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bb.2:
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$sgpr0_sgpr1 = S_MOV_B64 -1
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$sgpr0 = S_MOV_B32 0
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$vcc = S_AND_B64 $exec, killed $sgpr0_sgpr1, implicit-def dead $scc
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S_CBRANCH_VCCZ %bb.1, implicit killed $vcc
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S_ENDPGM 0
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...
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---
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# GCN-LABEL: name: and_execz_imm_vccz_liveout_scc
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# GCN: $vcc = S_AND_B64 $exec, -1, implicit-def $scc
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# GCN-NEXT: S_CBRANCH_EXECZ %bb.1, implicit $exec
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# GCN-NEXT: S_ENDPGM 0, implicit $scc
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name: and_execz_imm_vccz_liveout_scc
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body: |
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bb.0:
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S_NOP 0
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bb.1:
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S_NOP 0
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bb.2:
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$vcc = S_AND_B64 $exec, -1, implicit-def $scc
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S_CBRANCH_VCCZ %bb.1, implicit killed $vcc
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S_ENDPGM 0, implicit $scc
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...
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---
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# W32-LABEL: name: and_execz_mov_vccz_w32
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# W32-NOT: S_MOV_
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# W32-NOT: S_AND_
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# W32: S_CBRANCH_EXECZ %bb.1, implicit $exec
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name: and_execz_mov_vccz_w32
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body: |
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bb.0:
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S_NOP 0
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bb.1:
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S_NOP 0
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bb.2:
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$sgpr0 = S_MOV_B32 -1
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$vcc_lo = S_AND_B32 $exec_lo, killed $sgpr0, implicit-def dead $scc
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S_CBRANCH_VCCZ %bb.1, implicit killed $vcc
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S_ENDPGM 0
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...
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---
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# GCN-LABEL: name: andn2_execz_mov_vccz
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# GCN-NOT: S_MOV_
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# GCN-NOT: S_ANDN2_
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# GCN: S_CBRANCH_EXECZ %bb.1, implicit $exec
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name: andn2_execz_mov_vccz
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body: |
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bb.0:
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S_NOP 0
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bb.1:
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S_NOP 0
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bb.2:
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$sgpr0_sgpr1 = S_MOV_B64 0
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$vcc = S_ANDN2_B64 $exec, killed $sgpr0_sgpr1, implicit-def dead $scc
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S_CBRANCH_VCCZ %bb.1, implicit killed $vcc
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S_ENDPGM 0
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...
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---
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# GCN-LABEL: name: andn2_branch_mov_vccz
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# GCN-NOT: S_MOV_
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# GCN-NOT: S_ANDN2_
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# GCN: S_BRANCH %bb.1
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name: andn2_branch_mov_vccz
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body: |
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bb.0:
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S_NOP 0
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bb.1:
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S_NOP 0
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bb.2:
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$sgpr0_sgpr1 = S_MOV_B64 -1
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$vcc = S_ANDN2_B64 $exec, killed $sgpr0_sgpr1, implicit-def dead $scc
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S_CBRANCH_VCCZ %bb.1, implicit killed $vcc
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S_ENDPGM 0
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...
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---
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# GCN-LABEL: name: andn2_execnz_mov_vccnz
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# GCN-NOT: S_MOV_
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# GCN-NOT: S_ANDN2_
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# GCN: S_CBRANCH_EXECNZ %bb.1, implicit $exec
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name: andn2_execnz_mov_vccnz
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body: |
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bb.0:
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S_NOP 0
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bb.1:
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S_NOP 0
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bb.2:
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$sgpr0_sgpr1 = S_MOV_B64 0
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$vcc = S_ANDN2_B64 $exec, killed $sgpr0_sgpr1, implicit-def dead $scc
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S_CBRANCH_VCCNZ %bb.1, implicit killed $vcc
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S_ENDPGM 0
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...
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---
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# GCN-LABEL: name: andn2_no_branch_mov_vccnz
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# GCN-NOT: S_MOV_
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# GCN-NOT: S_ANDN2_
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# GCN-NOT: S_CBRANCH
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# GCN-NOT: S_BRANCH
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name: andn2_no_branch_mov_vccnz
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body: |
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bb.0:
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S_NOP 0
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bb.1:
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S_NOP 0
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bb.2:
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$sgpr0_sgpr1 = S_MOV_B64 -1
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$vcc = S_ANDN2_B64 $exec, killed $sgpr0_sgpr1, implicit-def dead $scc
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S_CBRANCH_VCCNZ %bb.1, implicit killed $vcc
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S_ENDPGM 0
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...
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---
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# GCN-LABEL: name: and_0_mov
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# GCN: bb.2:
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# GCN-NOT: S_AND
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# GCN: $vcc = S_MOV_B64 0
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# GCN-NEXT: S_BRANCH %bb.1
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name: and_0_mov
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body: |
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bb.0:
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S_NOP 0
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bb.1:
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S_NOP 0
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bb.2:
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$sgpr0_sgpr1 = S_MOV_B64 0
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$vcc = S_AND_B64 $exec, killed $sgpr0_sgpr1, implicit-def dead $scc
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S_CBRANCH_VCCZ %bb.1, implicit $vcc
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S_ENDPGM 0
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...
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---
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# GCN-LABEL: name: andn2_m1_mov
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# GCN: bb.2:
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# GCN-NOT: S_ANDN2
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# GCN: $vcc = S_MOV_B64 0
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# GCN-NEXT: S_BRANCH %bb.1
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name: andn2_m1_mov
|
|
body: |
|
|
bb.0:
|
|
S_NOP 0
|
|
|
|
bb.1:
|
|
S_NOP 0
|
|
|
|
bb.2:
|
|
$sgpr0_sgpr1 = S_MOV_B64 -1
|
|
$vcc = S_ANDN2_B64 $exec, killed $sgpr0_sgpr1, implicit-def dead $scc
|
|
S_CBRANCH_VCCZ %bb.1, implicit $vcc
|
|
S_ENDPGM 0
|
|
...
|
|
---
|
|
# GCN-LABEL: name: and_m1_mov
|
|
# GCN: bb.2:
|
|
# GCN-NOT: S_AND
|
|
# GCN: $vcc = S_MOV_B64 $exec
|
|
# GCN-NEXT: S_CBRANCH_EXECZ %bb.1, implicit $exec
|
|
name: and_m1_mov
|
|
body: |
|
|
bb.0:
|
|
S_NOP 0
|
|
|
|
bb.1:
|
|
S_NOP 0
|
|
|
|
bb.2:
|
|
$sgpr0_sgpr1 = S_MOV_B64 -1
|
|
$vcc = S_AND_B64 $exec, killed $sgpr0_sgpr1, implicit-def dead $scc
|
|
S_CBRANCH_VCCZ %bb.1, implicit $vcc
|
|
S_ENDPGM 0
|
|
...
|
|
---
|
|
# GCN-LABEL: name: andn2_0_mov
|
|
# GCN: bb.2:
|
|
# GCN-NOT: S_ANDN2
|
|
# GCN: $vcc = S_MOV_B64 $exec
|
|
# GCN-NEXT: S_CBRANCH_EXECZ %bb.1, implicit $exec
|
|
name: andn2_0_mov
|
|
body: |
|
|
bb.0:
|
|
S_NOP 0
|
|
|
|
bb.1:
|
|
S_NOP 0
|
|
|
|
bb.2:
|
|
$sgpr0_sgpr1 = S_MOV_B64 0
|
|
$vcc = S_ANDN2_B64 $exec, killed $sgpr0_sgpr1, implicit-def dead $scc
|
|
S_CBRANCH_VCCZ %bb.1, implicit $vcc
|
|
S_ENDPGM 0
|
|
...
|
|
---
|
|
# GCN-LABEL: name: and_0_scc_req
|
|
# GCN: bb.2:
|
|
# GCN-NOT: S_MOV_
|
|
# GCN: S_AND_
|
|
# GCN-NEXT: S_BRANCH %bb.1
|
|
name: and_0_scc_req
|
|
body: |
|
|
bb.0:
|
|
S_NOP 0
|
|
|
|
bb.1:
|
|
S_NOP 0
|
|
|
|
bb.2:
|
|
$sgpr0_sgpr1 = S_MOV_B64 0
|
|
$vcc = S_AND_B64 $exec, killed $sgpr0_sgpr1, implicit-def $scc
|
|
S_CBRANCH_VCCZ %bb.1, implicit $vcc
|
|
S_ENDPGM 0
|
|
...
|
|
---
|
|
# GCN-LABEL: name: andn2_m1_scc_req
|
|
# GCN: bb.2:
|
|
# GCN-NOT: S_MOV_
|
|
# GCN: S_ANDN2_
|
|
# GCN-NEXT: S_BRANCH %bb.1
|
|
name: andn2_m1_scc_req
|
|
body: |
|
|
bb.0:
|
|
S_NOP 0
|
|
|
|
bb.1:
|
|
S_NOP 0
|
|
|
|
bb.2:
|
|
$sgpr0_sgpr1 = S_MOV_B64 -1
|
|
$vcc = S_ANDN2_B64 $exec, killed $sgpr0_sgpr1, implicit-def $scc
|
|
S_CBRANCH_VCCZ %bb.1, implicit $vcc
|
|
S_ENDPGM 0
|
|
...
|
|
---
|
|
# GCN-LABEL: name: and_cmp_vccz
|
|
# GCN: V_CMP_EQ_U32_e32 0, killed $vgpr0, implicit-def $vcc, implicit $exec
|
|
# GCN-NOT: S_AND_
|
|
# GCN: S_CBRANCH_VCCZ %bb.1, implicit killed $vcc
|
|
name: and_cmp_vccz
|
|
body: |
|
|
bb.0:
|
|
S_NOP 0
|
|
|
|
bb.1:
|
|
S_NOP 0
|
|
|
|
bb.2:
|
|
V_CMP_EQ_U32_e32 0, killed $vgpr0, implicit-def $vcc, implicit $exec
|
|
$vcc = S_AND_B64 $exec, $vcc, implicit-def dead $scc
|
|
S_CBRANCH_VCCZ %bb.1, implicit killed $vcc
|
|
S_ENDPGM 0
|
|
...
|
|
---
|
|
# GCN-LABEL: name: and_cmp_vccnz
|
|
# GCN: V_CMP_EQ_U32_e32 0, killed $vgpr0, implicit-def $vcc, implicit $exec
|
|
# GCN-NOT: S_AND_
|
|
# GCN: S_CBRANCH_VCCNZ %bb.1, implicit killed $vcc
|
|
name: and_cmp_vccnz
|
|
body: |
|
|
bb.0:
|
|
S_NOP 0
|
|
|
|
bb.1:
|
|
S_NOP 0
|
|
|
|
bb.2:
|
|
V_CMP_EQ_U32_e32 0, killed $vgpr0, implicit-def $vcc, implicit $exec
|
|
$vcc = S_AND_B64 $exec, $vcc, implicit-def dead $scc
|
|
S_CBRANCH_VCCNZ %bb.1, implicit killed $vcc
|
|
S_ENDPGM 0
|
|
...
|
|
---
|
|
# GCN-LABEL: name: andn2_cmp_vccz
|
|
# GCN: V_CMP_EQ_U32_e32 0, killed $vgpr0, implicit-def $vcc, implicit $exec
|
|
# GCN: $vcc = S_ANDN2_B64 $exec, $vcc, implicit-def dead $scc
|
|
# GCN: S_CBRANCH_VCCZ %bb.1, implicit killed $vcc
|
|
name: andn2_cmp_vccz
|
|
body: |
|
|
bb.0:
|
|
S_NOP 0
|
|
|
|
bb.1:
|
|
S_NOP 0
|
|
|
|
bb.2:
|
|
V_CMP_EQ_U32_e32 0, killed $vgpr0, implicit-def $vcc, implicit $exec
|
|
$vcc = S_ANDN2_B64 $exec, $vcc, implicit-def dead $scc
|
|
S_CBRANCH_VCCZ %bb.1, implicit killed $vcc
|
|
S_ENDPGM 0
|
|
...
|
|
---
|
|
# GCN-LABEL: name: and_cmpclass_vccz
|
|
# GCN: V_CMP_CLASS_F32_e32 killed $sgpr0, killed $vgpr0, implicit-def $vcc, implicit $exec
|
|
# GCN-NOT: S_AND_
|
|
# GCN: S_CBRANCH_VCCZ %bb.1, implicit killed $vcc
|
|
name: and_cmpclass_vccz
|
|
body: |
|
|
bb.0:
|
|
S_NOP 0
|
|
|
|
bb.1:
|
|
S_NOP 0
|
|
|
|
bb.2:
|
|
V_CMP_CLASS_F32_e32 killed $sgpr0, killed $vgpr0, implicit-def $vcc, implicit $exec
|
|
$vcc = S_AND_B64 $exec, $vcc, implicit-def dead $scc
|
|
S_CBRANCH_VCCZ %bb.1, implicit killed $vcc
|
|
S_ENDPGM 0
|
|
...
|
|
---
|
|
# GCN-LABEL: name: and_cmpx_vccz
|
|
# GCN: V_CMPX_EQ_U32_e32 0, killed $vgpr0, implicit-def $vcc, implicit-def $exec, implicit $exec
|
|
# GCN-NOT: S_AND_
|
|
# GCN: S_CBRANCH_VCCZ %bb.1, implicit killed $vcc
|
|
name: and_cmpx_vccz
|
|
body: |
|
|
bb.0:
|
|
S_NOP 0
|
|
|
|
bb.1:
|
|
S_NOP 0
|
|
|
|
bb.2:
|
|
V_CMPX_EQ_U32_e32 0, killed $vgpr0, implicit-def $vcc, implicit-def $exec, implicit $exec
|
|
$vcc = S_AND_B64 $exec, $vcc, implicit-def dead $scc
|
|
S_CBRANCH_VCCZ %bb.1, implicit killed $vcc
|
|
S_ENDPGM 0
|
|
...
|
|
---
|
|
# GCN-LABEL: name: and_or_cmp_vccz
|
|
# GCN: V_CMP_EQ_U32_e32 0, killed $vgpr0, implicit-def $vcc, implicit $exec
|
|
# GCN: $exec = S_OR_B64 $exec, $sgpr0_sgpr1, implicit-def dead $scc
|
|
# GCN: $vcc = S_AND_B64 $exec, $vcc, implicit-def dead $scc
|
|
# GCN: S_CBRANCH_VCCZ %bb.1, implicit killed $vcc
|
|
name: and_or_cmp_vccz
|
|
body: |
|
|
bb.0:
|
|
S_NOP 0
|
|
|
|
bb.1:
|
|
S_NOP 0
|
|
|
|
bb.2:
|
|
V_CMP_EQ_U32_e32 0, killed $vgpr0, implicit-def $vcc, implicit $exec
|
|
$exec = S_OR_B64 $exec, $sgpr0_sgpr1, implicit-def dead $scc
|
|
$vcc = S_AND_B64 $exec, $vcc, implicit-def dead $scc
|
|
S_CBRANCH_VCCZ %bb.1, implicit killed $vcc
|
|
S_ENDPGM 0
|
|
...
|