b25b4c0ab4
SILowerSGPRSpills pass handles the lowering of SGPR spills into VGPR lanes. Some SGPR spills are handled later during PEI. There is a common function used in both places to find the free VGPR lane. This patch eliminates that dependency to find the free VGPR by handling it separately for PEI. It is a prerequisite patch for a future work to allow SGPR spills to virtual VGPR lanes during SILowerSGPRSpills. Reviewed By: arsenm Differential Revision: https://reviews.llvm.org/D124195
28 lines
767 B
LLVM
28 lines
767 B
LLVM
; RUN: llc -march=amdgcn -mcpu=gfx908 -verify-machineinstrs < %s | FileCheck -check-prefixes=GCN,GFX908 %s
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; RUN: llc -march=amdgcn -mcpu=gfx900 -verify-machineinstrs < %s | FileCheck -check-prefixes=GCN,GFX900 %s
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define void @foo() {
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bb:
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ret void
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}
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; FIXME: We spill v40 into AGPR, but still save and restore FP
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; which is not needed in this case.
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; GCN-LABEL: {{^}}caller:
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; GCN: s_mov_b32 [[TMP_SGPR:s[0-9]+]], s33
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; GCN: s_mov_b32 s33, s32
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; GFX900: buffer_store_dword
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; GFX908-DAG: v_accvgpr_write_b32
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; GCN: s_swappc_b64
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; GFX900: buffer_load_dword
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; GFX908: v_accvgpr_read_b32
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; GCN: s_mov_b32 s33, [[TMP_SGPR]]
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define i64 @caller() {
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bb:
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call void asm sideeffect "", "~{v40}" ()
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tail call void @foo()
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ret i64 0
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}
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