eb7d16ea25
mflr is kind of expensive on Power version smaller than 10, so we should schedule the store for the mflr's def away from mflr. In epilogue, the expensive mtlr has no user for its def, so it doesn't matter that the load and the mtlr are back-to-back. Reviewed By: RolandF Differential Revision: https://reviews.llvm.org/D137423
58 lines
2.1 KiB
LLVM
58 lines
2.1 KiB
LLVM
; NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py
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; RUN: llc -verify-machineinstrs -mtriple=powerpc64le-unknown-linux-gnu \
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; RUN: -ppc-asm-full-reg-names -mcpu=pwr8 < %s | FileCheck %s
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%struct.m.2.5.8.11 = type { %struct.l.0.3.6.9, [7 x i8], %struct.a.1.4.7.10 }
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%struct.l.0.3.6.9 = type { i8 }
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%struct.a.1.4.7.10 = type { [27 x i8], [0 x i32], [4 x i8] }
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define void @_ZN1m1nEv(ptr %this) local_unnamed_addr nounwind align 2 {
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; CHECK-LABEL: _ZN1m1nEv:
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; CHECK: # %bb.0: # %entry
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; CHECK-NEXT: mflr r0
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; CHECK-NEXT: std r30, -16(r1) # 8-byte Folded Spill
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; CHECK-NEXT: stdu r1, -48(r1)
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; CHECK-NEXT: std r0, 64(r1)
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; CHECK-NEXT: mr r30, r3
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; CHECK-NEXT: ld r3, 8(r3)
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; CHECK-NEXT: lwz r4, 36(r30)
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; CHECK-NEXT: rldicl r3, r3, 60, 4
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; CHECK-NEXT: clrlwi r4, r4, 31
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; CHECK-NEXT: slwi r3, r3, 31
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; CHECK-NEXT: rlwimi r4, r3, 0, 0, 0
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; CHECK-NEXT: bl _ZN1llsE1d
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; CHECK-NEXT: nop
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; CHECK-NEXT: ld r3, 16(r30)
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; CHECK-NEXT: ld r4, 8(r30)
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; CHECK-NEXT: rldicl r4, r4, 60, 4
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; CHECK-NEXT: sldi r3, r3, 60
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; CHECK-NEXT: or r3, r3, r4
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; CHECK-NEXT: sldi r3, r3, 31
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; CHECK-NEXT: rlwinm r4, r3, 0, 0, 0
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; CHECK-NEXT: bl _ZN1llsE1d
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; CHECK-NEXT: nop
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; CHECK-NEXT: addi r1, r1, 48
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; CHECK-NEXT: ld r0, 16(r1)
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; CHECK-NEXT: ld r30, -16(r1) # 8-byte Folded Reload
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; CHECK-NEXT: mtlr r0
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; CHECK-NEXT: blr
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entry:
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%bc = getelementptr inbounds %struct.m.2.5.8.11, ptr %this, i64 0, i32 2
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%bf.load = load i216, ptr %bc, align 8
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%bf.lshr = lshr i216 %bf.load, 4
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%shl.i23 = shl i216 %bf.lshr, 31
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%shl.i = trunc i216 %shl.i23 to i32
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%arrayidx = getelementptr inbounds %struct.m.2.5.8.11, ptr %this, i64 0, i32 2, i32 1, i64 0
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%0 = load i32, ptr %arrayidx, align 4
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%and.i = and i32 %0, 1
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%or.i = or i32 %and.i, %shl.i
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tail call void @_ZN1llsE1d(ptr undef, i32 %or.i) #1
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%bf.load10 = load i216, ptr %bc, align 8
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%bf.lshr11 = lshr i216 %bf.load10, 4
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%shl.i1524 = shl i216 %bf.lshr11, 31
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%shl.i15 = trunc i216 %shl.i1524 to i32
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tail call void @_ZN1llsE1d(ptr undef, i32 %shl.i15) #1
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ret void
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}
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declare void @_ZN1llsE1d(ptr, i32) local_unnamed_addr #0
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