a2b5117df7
Count of input operands affect pipeline forwarding in scheduling model. Previous Power10 model definition arranges some instructions into incorrect groups, by counting the wrong number of input operands. This patch updates the model, setting the input operands count correctly by excluding irrelevant immediate operands and count memory operands of load instructions correctly. Reviewed By: shchenz Differential Revision: https://reviews.llvm.org/D153842
184 lines
7.0 KiB
LLVM
184 lines
7.0 KiB
LLVM
; NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py
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; RUN: llc -relocation-model=pic -verify-machineinstrs -mtriple=powerpc64-unknown-linux-gnu -O2 \
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; RUN: -ppc-gpr-icmps=all -ppc-asm-full-reg-names -mcpu=pwr8 < %s | FileCheck %s \
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; RUN: --implicit-check-not cmpw --implicit-check-not cmpd --implicit-check-not cmpl \
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; RUN: --check-prefixes=CHECK,BE
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; RUN: llc -relocation-model=pic -verify-machineinstrs -mtriple=powerpc64le-unknown-linux-gnu -O2 \
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; RUN: -ppc-gpr-icmps=all -ppc-asm-full-reg-names -mcpu=pwr8 < %s | FileCheck %s \
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; RUN: --implicit-check-not cmpw --implicit-check-not cmpd --implicit-check-not cmpl \
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; RUN: --check-prefixes=CHECK,LE
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; RUN: llc -verify-machineinstrs -mtriple=powerpc64le-unknown-linux-gnu -O2 \
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; RUN: -ppc-asm-full-reg-names -mcpu=pwr10 < %s | \
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; RUN: FileCheck %s --check-prefixes=CHECK-P10,CHECK-P10-LE
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; RUN: llc -verify-machineinstrs -mtriple=powerpc64-unknown-linux-gnu -O2 \
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; RUN: -ppc-asm-full-reg-names -mcpu=pwr10 < %s | \
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; RUN: FileCheck %s --check-prefixes=CHECK-P10,CHECK-P10-BE
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; RUN: llc -verify-machineinstrs -mtriple=powerpc64-unknown-linux-gnu -O2 \
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; RUN: -ppc-gpr-icmps=all -ppc-asm-full-reg-names -mcpu=pwr10 < %s | \
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; RUN: FileCheck %s --check-prefixes=CHECK-P10-CMP,CHECK-P10-CMP-LE \
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; RUN: --implicit-check-not cmpw --implicit-check-not cmpd \
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; RUN: --implicit-check-not cmpl
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; RUN: llc -verify-machineinstrs -mtriple=powerpc64le-unknown-linux-gnu -O2 \
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; RUN: -ppc-gpr-icmps=all -ppc-asm-full-reg-names -mcpu=pwr10 < %s | \
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; RUN: FileCheck %s --check-prefixes=CHECK-P10-CMP,CHECK-P10-CMP-BE \
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; RUN: --implicit-check-not cmpw --implicit-check-not cmpd \
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; RUN: --implicit-check-not cmpl
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%struct.tree_common = type { i8, [3 x i8] }
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declare signext i32 @fn2(...) local_unnamed_addr #1
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; Function Attrs: nounwind
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define dso_local i32 @testCompare1(ptr nocapture readonly %arg1) nounwind {
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; BE-LABEL: testCompare1:
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; BE: # %bb.0: # %entry
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; BE-NEXT: mflr r0
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; BE-NEXT: stdu r1, -112(r1)
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; BE-NEXT: std r0, 128(r1)
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; BE-NEXT: addis r4, r2, testCompare1@toc@ha
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; BE-NEXT: lbz r4, testCompare1@toc@l(r4)
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; BE-NEXT: lbz r3, 0(r3)
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; BE-NEXT: clrlwi r4, r4, 31
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; BE-NEXT: clrlwi r3, r3, 31
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; BE-NEXT: clrldi r4, r4, 32
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; BE-NEXT: clrldi r3, r3, 32
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; BE-NEXT: sub r3, r4, r3
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; BE-NEXT: rldicl r3, r3, 1, 63
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; BE-NEXT: bl fn2
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; BE-NEXT: nop
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; BE-NEXT: addi r1, r1, 112
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; BE-NEXT: ld r0, 16(r1)
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; BE-NEXT: mtlr r0
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; BE-NEXT: blr
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;
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; LE-LABEL: testCompare1:
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; LE: # %bb.0: # %entry
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; LE-NEXT: mflr r0
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; LE-NEXT: stdu r1, -32(r1)
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; LE-NEXT: std r0, 48(r1)
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; LE-NEXT: addis r4, r2, testCompare1@toc@ha
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; LE-NEXT: lbz r4, testCompare1@toc@l(r4)
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; LE-NEXT: lbz r3, 0(r3)
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; LE-NEXT: clrlwi r4, r4, 31
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; LE-NEXT: clrlwi r3, r3, 31
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; LE-NEXT: clrldi r4, r4, 32
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; LE-NEXT: clrldi r3, r3, 32
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; LE-NEXT: sub r3, r4, r3
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; LE-NEXT: rldicl r3, r3, 1, 63
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; LE-NEXT: bl fn2
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; LE-NEXT: nop
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; LE-NEXT: addi r1, r1, 32
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; LE-NEXT: ld r0, 16(r1)
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; LE-NEXT: mtlr r0
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; LE-NEXT: blr
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;
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; CHECK-P10-LE-LABEL: testCompare1:
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; CHECK-P10-LE: # %bb.0: # %entry
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; CHECK-P10-LE-NEXT: plbz r4, testCompare1@PCREL(0), 1
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; CHECK-P10-LE-NEXT: lbz r3, 0(r3)
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; CHECK-P10-LE-NEXT: clrlwi r4, r4, 31
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; CHECK-P10-LE-NEXT: clrlwi r3, r3, 31
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; CHECK-P10-LE-NEXT: cmplw r4, r3
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; CHECK-P10-LE-NEXT: setbc r3, lt
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; CHECK-P10-LE-NEXT: b fn2@notoc
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; CHECK-P10-LE-NEXT: #TC_RETURNd8 fn2@notoc 0
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;
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; CHECK-P10-BE-LABEL: testCompare1:
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; CHECK-P10-BE: # %bb.0: # %entry
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; CHECK-P10-BE-NEXT: mflr r0
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; CHECK-P10-BE-NEXT: std r0, 16(r1)
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; CHECK-P10-BE-NEXT: stdu r1, -112(r1)
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; CHECK-P10-BE-NEXT: addis r4, r2, testCompare1@toc@ha
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; CHECK-P10-BE-NEXT: lbz r3, 0(r3)
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; CHECK-P10-BE-NEXT: lbz r4, testCompare1@toc@l(r4)
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; CHECK-P10-BE-NEXT: clrlwi r3, r3, 31
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; CHECK-P10-BE-NEXT: clrlwi r4, r4, 31
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; CHECK-P10-BE-NEXT: cmplw r4, r3
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; CHECK-P10-BE-NEXT: setbc r3, lt
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; CHECK-P10-BE-NEXT: bl fn2
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; CHECK-P10-BE-NEXT: nop
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; CHECK-P10-BE-NEXT: addi r1, r1, 112
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; CHECK-P10-BE-NEXT: ld r0, 16(r1)
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; CHECK-P10-BE-NEXT: mtlr r0
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; CHECK-P10-BE-NEXT: blr
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;
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; CHECK-P10-CMP-LE-LABEL: testCompare1:
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; CHECK-P10-CMP-LE: # %bb.0: # %entry
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; CHECK-P10-CMP-LE-NEXT: mflr r0
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; CHECK-P10-CMP-LE-NEXT: std r0, 16(r1)
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; CHECK-P10-CMP-LE-NEXT: stdu r1, -112(r1)
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; CHECK-P10-CMP-LE-NEXT: addis r4, r2, testCompare1@toc@ha
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; CHECK-P10-CMP-LE-NEXT: lbz r3, 0(r3)
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; CHECK-P10-CMP-LE-NEXT: lbz r4, testCompare1@toc@l(r4)
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; CHECK-P10-CMP-LE-NEXT: clrlwi r3, r3, 31
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; CHECK-P10-CMP-LE-NEXT: clrldi r3, r3, 32
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; CHECK-P10-CMP-LE-NEXT: clrlwi r4, r4, 31
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; CHECK-P10-CMP-LE-NEXT: clrldi r4, r4, 32
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; CHECK-P10-CMP-LE-NEXT: sub r3, r4, r3
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; CHECK-P10-CMP-LE-NEXT: rldicl r3, r3, 1, 63
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; CHECK-P10-CMP-LE-NEXT: bl fn2
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; CHECK-P10-CMP-LE-NEXT: nop
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; CHECK-P10-CMP-LE-NEXT: addi r1, r1, 112
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; CHECK-P10-CMP-LE-NEXT: ld r0, 16(r1)
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; CHECK-P10-CMP-LE-NEXT: mtlr r0
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; CHECK-P10-CMP-LE-NEXT: blr
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;
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; CHECK-P10-CMP-BE-LABEL: testCompare1:
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; CHECK-P10-CMP-BE: # %bb.0: # %entry
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; CHECK-P10-CMP-BE-NEXT: plbz r4, testCompare1@PCREL(0), 1
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; CHECK-P10-CMP-BE-NEXT: lbz r3, 0(r3)
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; CHECK-P10-CMP-BE-NEXT: clrlwi r4, r4, 31
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; CHECK-P10-CMP-BE-NEXT: clrlwi r3, r3, 31
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; CHECK-P10-CMP-BE-NEXT: clrldi r4, r4, 32
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; CHECK-P10-CMP-BE-NEXT: clrldi r3, r3, 32
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; CHECK-P10-CMP-BE-NEXT: sub r3, r4, r3
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; CHECK-P10-CMP-BE-NEXT: rldicl r3, r3, 1, 63
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; CHECK-P10-CMP-BE-NEXT: b fn2@notoc
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; CHECK-P10-CMP-BE-NEXT: #TC_RETURNd8 fn2@notoc 0
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entry:
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%bf.load = load i8, ptr @testCompare1, align 4
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%bf.clear = and i8 %bf.load, 1
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%bf.load1 = load i8, ptr %arg1, align 4
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%bf.clear2 = and i8 %bf.load1, 1
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%cmp = icmp ult i8 %bf.clear, %bf.clear2
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%conv = zext i1 %cmp to i32
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%call = tail call signext i32 @fn2(i32 signext %conv) #2
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ret i32 undef
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}
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; Function Attrs: norecurse nounwind readnone
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define dso_local signext i32 @testCompare2(i32 zeroext %a, i32 zeroext %b) {
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; CHECK-LABEL: testCompare2:
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; CHECK: # %bb.0: # %entry
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; CHECK-NEXT: clrlwi r3, r3, 31
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; CHECK-NEXT: clrlwi r4, r4, 31
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; CHECK-NEXT: clrldi r3, r3, 32
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; CHECK-NEXT: clrldi r4, r4, 32
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; CHECK-NEXT: sub r3, r3, r4
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; CHECK-NEXT: rldicl r3, r3, 1, 63
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; CHECK-NEXT: blr
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;
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; CHECK-P10-LABEL: testCompare2:
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; CHECK-P10: # %bb.0: # %entry
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; CHECK-P10-NEXT: clrlwi r3, r3, 31
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; CHECK-P10-NEXT: clrlwi r4, r4, 31
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; CHECK-P10-NEXT: cmplw r3, r4
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; CHECK-P10-NEXT: setbc r3, lt
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; CHECK-P10-NEXT: blr
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;
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; CHECK-P10-CMP-LABEL: testCompare2:
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; CHECK-P10-CMP: # %bb.0: # %entry
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; CHECK-P10-CMP-NEXT: clrlwi r3, r3, 31
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; CHECK-P10-CMP-NEXT: clrlwi r4, r4, 31
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; CHECK-P10-CMP-NEXT: clrldi r3, r3, 32
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; CHECK-P10-CMP-NEXT: clrldi r4, r4, 32
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; CHECK-P10-CMP-NEXT: sub r3, r3, r4
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; CHECK-P10-CMP-NEXT: rldicl r3, r3, 1, 63
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; CHECK-P10-CMP-NEXT: blr
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entry:
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%and = and i32 %a, 1
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%and1 = and i32 %b, 1
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%cmp = icmp ult i32 %and, %and1
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%conv = zext i1 %cmp to i32
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ret i32 %conv
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}
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