Files
clang-p2996/llvm/test/CodeGen/RISCV/align.ll
wangpc 61ab106f82 [RISCV] Add tune features of preferred function/loop align
D144048 has added preferred function and loop alignment to
RISCVSubtarget, but now we need to set them manually for
different processors.

Tune features that set preferred function/loop align to
[2, 64] bytes (align 1 is not here since the min align is 2)
are added. These features can be used in processor
definitions.

Reviewed By: asb

Differential Revision: https://reviews.llvm.org/D157832
2023-08-15 12:04:12 +08:00

26 lines
947 B
LLVM

; RUN: llc -mtriple=riscv32 -verify-machineinstrs < %s \
; RUN: | FileCheck %s -check-prefix=RV32I
; RUN: llc -mtriple=riscv32 -mattr=+c -verify-machineinstrs < %s \
; RUN: | FileCheck %s -check-prefix=RV32C
; RUN: llc -mtriple=riscv32 -mattr=+pref-func-align-32 -verify-machineinstrs < %s \
; RUN: | FileCheck %s -check-prefix=ALIGN-32
; RUN: llc -filetype=obj -mtriple=riscv32 < %s -o %t
; RUN: llvm-readelf -S %t | FileCheck %s --check-prefixes=SEC,SEC-I
; RUN: llc -filetype=obj -mtriple=riscv32 -mattr=+c < %s -o %t
; RUN: llvm-readelf -S %t | FileCheck %s --check-prefixes=SEC,SEC-C
; SEC: Name Type Address Off Size ES Flg Lk Inf Al
; SEC-I: .text PROGBITS 00000000 [[#%x,]] [[#%x,]] 00 AX 0 0 4
; SEC-C: .text PROGBITS 00000000 [[#%x,]] [[#%x,]] 00 AX 0 0 2
define void @foo() {
;RV32I: .p2align 2
;RV32I: foo:
;RV32C: .p2align 1
;RV32C: foo:
;ALIGN-32: .p2align 5
;ALIGN-32: foo:
entry:
ret void
}