LiDongjin 4554663bc0 Recommit "[RISCV] Enable the LocalStackSlotAllocation pass support" ...

This includes a fix for the tramp3d failure from the llvm-testsuite
that caused the last revert. Hopefully the others failures were the
same issue.

Original commit message:
For RISC-V, load/store(exclude vector load/store) instructions only has a 12 bit immediate operand. If the offset is out-of-range, it must make use of a temp register to make up this offset. If between these offsets, they have a small(IsInt<12>) relative offset, LocalStackSlotAllocation pass can find a value as frame base register's value, and replace the origin offset with this register's value plus the relative offset.

Co-authored-by: luxufan <luxufan@iscas.ac.cn>
Co-authored-by: Craig Topper <craig.topper@sifive.com>

Differential Revision: https://reviews.llvm.org/D98101

2023-01-06 09:54:19 -08:00

..

GlobalISel

…

intrinsics

…

rvv

[RISCV] Improve 4x and 8x (s/u)int_to_fp.

2023-01-06 08:39:14 -08:00

add-before-shl.ll

[RISCV] Add pass to remove W suffix from ADDIW and SLLIW to improve compressibility

2022-12-22 14:19:26 -08:00

add-imm.ll

[RISCV] Add pass to remove W suffix from ADDIW and SLLIW to improve compressibility

2022-12-22 14:19:26 -08:00

addc-adde-sube-subc.ll

[RISCV] Add integer scalar instructions to isAssociativeAndCommutative

2022-12-29 11:43:40 +00:00

addcarry.ll

[RISCV] Add integer scalar instructions to isAssociativeAndCommutative

2022-12-29 11:43:40 +00:00

addimm-mulimm.ll

[RISCV] Add integer scalar instructions to isAssociativeAndCommutative

2022-12-29 11:43:40 +00:00

addrspacecast.ll

[RISCV] Convert some tests to opaque pointers (NFC)

2022-12-19 13:01:08 +01:00

aext-to-sext.ll

[RISCV] Teach getRegAllocationHints about compressible SRAI/SRLI.

2022-11-30 10:28:57 -08:00

align-loops.ll

…

align.ll

…

alloca.ll

[RISCV] Convert some tests to opaque pointers (NFC)

2022-12-19 13:01:08 +01:00

alu8.ll

[RISCV] Convert some tests to opaque pointers (NFC)

2022-12-19 13:01:08 +01:00

alu16.ll

[RISCV] Convert some tests to opaque pointers (NFC)

2022-12-19 13:01:08 +01:00

alu32.ll

…

alu64.ll

[RISCV] Use SUB instead of XOR in lowerShiftLeftParts/lowerShiftRightParts./

2022-12-29 17:04:52 -08:00

analyze-branch.ll

…

and.ll

[RISCV] Use register allocation hints to improve use of compressed instructions.

2022-11-25 08:39:44 -08:00

arith-with-overflow.ll

[RISCV] Convert some tests to opaque pointers (NFC)

2022-12-19 13:01:08 +01:00

atomic-cmpxchg-branch-on-result.ll

[RISCV] Add pass to remove W suffix from ADDIW and SLLIW to improve compressibility

2022-12-22 14:19:26 -08:00

atomic-cmpxchg-flag.ll

[RISCV] Convert some tests to opaque pointers (NFC)

2022-12-19 13:01:08 +01:00

atomic-cmpxchg.ll

[RISCV] Add pass to remove W suffix from ADDIW and SLLIW to improve compressibility

2022-12-22 14:19:26 -08:00

atomic-fence.ll

…

atomic-load-store.ll

[RISCV] Convert some tests to opaque pointers (NFC)

2022-12-19 13:01:08 +01:00

atomic-rmw.ll

[RISCV] Add pass to remove W suffix from ADDIW and SLLIW to improve compressibility

2022-12-22 14:19:26 -08:00

atomic-signext.ll

[RISCV] Add pass to remove W suffix from ADDIW and SLLIW to improve compressibility

2022-12-22 14:19:26 -08:00

attributes.ll

[RISCV] Add Svpbmt extension support.

2022-12-28 23:57:54 -08:00

bitreverse-shift.ll

…

bittest.ll

[SDAG] neg x with only low bit demanded is x

2022-12-19 15:25:43 -08:00

blockaddress.ll

[RISCV] Convert some tests to opaque pointers (NFC)

2022-12-19 13:01:08 +01:00

branch_zero.ll

[RISCV] Omit SRA in case of setlt or setge with zero constant

2022-12-21 14:19:49 +03:00

branch-relaxation.ll

[RISCV] Enable the Machine Late Cleanup pass.

2022-12-11 20:55:05 -08:00

branch.ll

[RISCV] Convert some tests to opaque pointers (NFC)

2022-12-19 13:01:08 +01:00

bswap-bitreverse.ll

[RISCV] Add integer scalar instructions to isAssociativeAndCommutative

2022-12-29 11:43:40 +00:00

bswap-shift.ll

…

byval.ll

[RISCV] Convert some tests to opaque pointers (NFC)

2022-12-19 13:01:08 +01:00

callee-saved-fpr32s.ll

[RISCV] Convert some tests to opaque pointers (NFC)

2022-12-19 13:01:08 +01:00

callee-saved-fpr64s.ll

[RISCV] Convert some tests to opaque pointers (NFC)

2022-12-19 13:01:08 +01:00

callee-saved-gprs.ll

[RISCV] Convert some tests to opaque pointers (NFC)

2022-12-19 13:01:08 +01:00

calling-conv-half.ll

[RISCV] Codegen support for Zfhmin.

2022-12-06 22:14:15 -08:00

calling-conv-ilp32-ilp32f-common.ll

[RISCV] Add integer scalar instructions to isAssociativeAndCommutative

2022-12-29 11:43:40 +00:00

calling-conv-ilp32-ilp32f-ilp32d-common.ll

[RISCV] Add integer scalar instructions to isAssociativeAndCommutative

2022-12-29 11:43:40 +00:00

calling-conv-ilp32.ll

…

calling-conv-ilp32d.ll

…

calling-conv-ilp32f-ilp32d-common.ll

…

calling-conv-lp64-lp64f-common.ll

[RISCV] Use register allocation hints to improve use of compressed instructions.

2022-11-25 08:39:44 -08:00

calling-conv-lp64-lp64f-lp64d-common.ll

[RISCV] Add integer scalar instructions to isAssociativeAndCommutative

2022-12-29 11:43:40 +00:00

calling-conv-lp64.ll

…

calling-conv-rv32f-ilp32.ll

…

calling-conv-sext-zext.ll

…

calling-conv-vector-float.ll

…

calls.ll

[RISCV] Convert some tests to opaque pointers (NFC)

2022-12-19 13:01:08 +01:00

cmp-bool.ll

[RISCV] Convert some tests to opaque pointers (NFC)

2022-12-19 13:01:08 +01:00

codemodel-lowering.ll

[RISCV] Teach RISCVMergeBaseOffset to handle constant pools.

2022-12-20 07:16:43 -08:00

compress-float.ll

[RISCV] Convert some tests to opaque pointers (NFC)

2022-12-19 13:01:08 +01:00

compress-inline-asm.ll

[RISCV] Convert some tests to opaque pointers (NFC)

2022-12-19 13:01:08 +01:00

compress-opt-branch.ll

[RISCV] Optimization for using compressed beqz and bnez PR#56391

2022-10-06 09:33:32 -07:00

compress-opt-select.ll

[RISCV] Use branchless form for selects with 0 in either arm

2022-10-12 13:51:52 -07:00

compress.ll

[RISCV] Add integer scalar instructions to isAssociativeAndCommutative

2022-12-29 11:43:40 +00:00

copy-frameindex.mir

llvm-reduce: Don't assert on functions which don't track liveness

2022-06-07 10:00:25 -04:00

copysign-casts.ll

[RISCV] Add integer scalar instructions to isAssociativeAndCommutative

2022-12-29 11:43:40 +00:00

ctlz-cttz-ctpop.ll

[RISCV] Support SRLI in hasAllNBitUsers.

2022-12-28 13:10:52 -08:00

disable-tail-calls.ll

…

disjoint.ll

[RISCV] Convert some tests to opaque pointers (NFC)

2022-12-19 13:01:08 +01:00

div_minsize.ll

[RISCV]Enable isIntDivCheap when attribute is minsize

2022-07-27 18:22:51 +08:00

div-by-constant.ll

[RISCV] Add integer scalar instructions to isAssociativeAndCommutative

2022-12-29 11:43:40 +00:00

div-pow2.ll

[RISCV] Add integer scalar instructions to isAssociativeAndCommutative

2022-12-29 11:43:40 +00:00

div.ll

[RISCV] Add integer scalar instructions to isAssociativeAndCommutative

2022-12-29 11:43:40 +00:00

double-arith-strict.ll

[RISCV] Add ADDW/AND/OR/XOR/SUB/SUBW to getRegAllocHints.

2022-12-01 11:09:38 -08:00

double-arith.ll

[RISCV] Add ADDW/AND/OR/XOR/SUB/SUBW to getRegAllocHints.

2022-12-01 11:09:38 -08:00

double-bitmanip-dagcombines.ll

…

double-br-fcmp.ll

[RISCV] Restore "Enable shrink wrap by default"

2022-07-02 11:13:13 +08:00

double-calling-conv.ll

…

double-convert-strict.ll

[RISCV] Convert some tests to opaque pointers (NFC)

2022-12-19 13:01:08 +01:00

double-convert.ll

[RISCV] Convert some tests to opaque pointers (NFC)

2022-12-19 13:01:08 +01:00

double-fcmp-strict.ll

[RISCV] Add ADDW/AND/OR/XOR/SUB/SUBW to getRegAllocHints.

2022-12-01 11:09:38 -08:00

double-fcmp.ll

[RISCV][test][NFC] Regenerate RISC-V tests with update_llc_test_checks.py -u

2022-07-13 19:37:34 +01:00

double-frem.ll

[RISCV] Implement isUsedByReturnOnly TargetLowering hook in order to tailcall more libcalls

2022-08-10 10:50:29 +01:00

double-imm.ll

[RISCV] Use check-prefixes to reduce check lines

2022-06-06 15:59:15 +08:00

double-intrinsics-strict.ll

[RISCV] Use check-prefixes to reduce check lines

2022-06-06 15:59:15 +08:00

double-intrinsics.ll

[RISCV] Inline scalar ceil/floor/trunc/rint/round/roundeven.

2022-10-26 14:36:49 -07:00

double-isnan.ll

[RISCV] Use check-prefixes to reduce check lines

2022-06-06 15:59:15 +08:00

double-mem.ll

[RISCV] Convert some tests to opaque pointers (NFC)

2022-12-19 13:01:08 +01:00

double-previous-failure.ll

[RISCV] Teach combineDeMorganOfBoolean to handle (and (xor X, 1), (not Y)).

2022-08-25 10:55:45 -07:00

double-round-conv-sat.ll

[RISCV] Match (select C, -1, X)->(or -C, X) during lowerSelect

2022-10-13 09:06:12 -07:00

double-round-conv.ll

[RISCV] Inline scalar ceil/floor/trunc/rint/round/roundeven.

2022-10-26 14:36:49 -07:00

double-select-fcmp.ll

[RISCV] Fold (sub C, (xor (setcc), 1)) -> (add (setcc), C-1).

2022-08-17 09:50:08 -07:00

double-select-icmp.ll

[RISCV] Add test coverage for (select (icmp X, Y), float, float). NFC

2022-08-16 21:28:26 -07:00

double-stack-spill-restore.ll

[RISCV] Restore "Enable shrink wrap by default"

2022-07-02 11:13:13 +08:00

dwarf-eh.ll

[RISCV] Convert some tests to opaque pointers (NFC)

2022-12-19 13:01:08 +01:00

early-clobber-tied-def-subreg-liveness.ll

[RISCV] Generate .cfi_def_cfa_expression for RVV stack adjustment

2022-12-06 12:45:59 +03:00

early-clobber-tied-def-subreg-liveness.mir

Reland "[SplitKit] Handle early clobber + tied to def correctly"

2022-06-16 17:13:09 +08:00

eh-dwarf-cfa.ll

[RISCV] Convert some tests to opaque pointers (NFC)

2022-12-19 13:01:08 +01:00

elf-preemption.ll

[RISCV] Convert some tests to opaque pointers (NFC)

2022-12-19 13:01:08 +01:00

exception-pointer-register.ll

[RISCV] Convert some tests to opaque pointers (NFC)

2022-12-19 13:01:08 +01:00

fastcc-float.ll

…

fastcc-int.ll

…

fixups-diff.ll

[RISCV] Convert some tests to opaque pointers (NFC)

2022-12-19 13:01:08 +01:00

fixups-relax-diff.ll

[RISCV] Convert some tests to opaque pointers (NFC)

2022-12-19 13:01:08 +01:00

float-arith-strict.ll

[RISCV] Add ADDW/AND/OR/XOR/SUB/SUBW to getRegAllocHints.

2022-12-01 11:09:38 -08:00

float-arith.ll

[RISCV] Add ADDW/AND/OR/XOR/SUB/SUBW to getRegAllocHints.

2022-12-01 11:09:38 -08:00

float-bit-preserving-dagcombines.ll

[RISCV] Add ADDW/AND/OR/XOR/SUB/SUBW to getRegAllocHints.

2022-12-01 11:09:38 -08:00

float-bitmanip-dagcombines.ll

…

float-br-fcmp.ll

[RISCV] Restore "Enable shrink wrap by default"

2022-07-02 11:13:13 +08:00

float-convert-strict.ll

[RISCV] Convert some tests to opaque pointers (NFC)

2022-12-19 13:01:08 +01:00

float-convert.ll

[RISCV] Convert some tests to opaque pointers (NFC)

2022-12-19 13:01:08 +01:00

float-fcmp-strict.ll

[RISCV] Add ADDW/AND/OR/XOR/SUB/SUBW to getRegAllocHints.

2022-12-01 11:09:38 -08:00

float-fcmp.ll

[RISCV] Use check-prefixes to reduce check lines

2022-06-06 15:59:15 +08:00

float-frem.ll

…

float-imm.ll

[RISCV] Use check-prefixes to reduce check lines

2022-06-06 15:59:15 +08:00

float-intrinsics-strict.ll

[RISCV] Use check-prefixes to reduce check lines

2022-06-06 15:59:15 +08:00

float-intrinsics.ll

[RISCV] Inline scalar ceil/floor/trunc/rint/round/roundeven.

2022-10-26 14:36:49 -07:00

float-isnan.ll

[RISCV] Use check-prefixes to reduce check lines

2022-06-06 15:59:15 +08:00

float-mem.ll

[RISCV] Convert some tests to opaque pointers (NFC)

2022-12-19 13:01:08 +01:00

float-round-conv-sat.ll

[RISCV] Inline scalar ceil/floor/trunc/rint/round/roundeven.

2022-10-26 14:36:49 -07:00

float-round-conv.ll

[RISCV] Inline scalar ceil/floor/trunc/rint/round/roundeven.

2022-10-26 14:36:49 -07:00

float-select-fcmp.ll

[RISCV] Fold (sub C, (xor (setcc), 1)) -> (add (setcc), C-1).

2022-08-17 09:50:08 -07:00

float-select-icmp.ll

[RISCV] Add test coverage for (select (icmp X, Y), float, float). NFC

2022-08-16 21:28:26 -07:00

flt-rounds.ll

[Intrinsic] Rename flt.rounds intrinsic to get.rounding

2022-12-19 15:22:39 +08:00

fmax-fmin.ll

…

fold-addi-loadstore.ll

[RISCV] Convert some tests to opaque pointers (NFC)

2022-12-19 13:01:08 +01:00

fold-vector-cmp.ll

[RISCV] Use register allocation hints to improve use of compressed instructions.

2022-11-25 08:39:44 -08:00

forced-atomics.ll

[SDAG] neg x with only low bit demanded is x

2022-12-19 15:25:43 -08:00

fp16-promote.ll

[RISCV] Convert some tests to opaque pointers (NFC)

2022-12-19 13:01:08 +01:00

fp128.ll

[RISCV] Convert some tests to opaque pointers (NFC)

2022-12-19 13:01:08 +01:00

fp-imm.ll

[RISCV] Convert some tests to opaque pointers (NFC)

2022-12-19 13:01:08 +01:00

fpclamptosat_vec.ll

[RISCV] Use tail agnostic if inserting subvector/element at the end of a vector.

2022-12-31 11:29:09 +08:00

fpclamptosat.ll

[RISCV] Add integer scalar instructions to isAssociativeAndCommutative

2022-12-29 11:43:40 +00:00

fpenv.ll

[RISCV] Add pass to remove W suffix from ADDIW and SLLIW to improve compressibility

2022-12-22 14:19:26 -08:00

frame-info.ll

[RISCV] Convert some tests to opaque pointers (NFC)

2022-12-19 13:01:08 +01:00

frame.ll

[RISCV] Convert some tests to opaque pointers (NFC)

2022-12-19 13:01:08 +01:00

frameaddr-returnaddr.ll

[RISCV] Convert some tests to opaque pointers (NFC)

2022-12-19 13:01:08 +01:00

frm-dependency.ll

…

get-register-invalid.ll

…

get-register-noreserve.ll

[RISCV] Add llvm.read.register support for vlenb

2022-05-13 09:12:02 -07:00

get-register-reserve.ll

…

get-setcc-result-type.ll

[RISCV] Convert some tests to opaque pointers (NFC)

2022-12-19 13:01:08 +01:00

ghccc-nest.ll

[RISCV] Add support for static chain

2022-11-09 16:10:32 +08:00

ghccc-rv32.ll

[RISCV] Convert some tests to opaque pointers (NFC)

2022-12-19 13:01:08 +01:00

ghccc-rv64.ll

[RISCV] Convert some tests to opaque pointers (NFC)

2022-12-19 13:01:08 +01:00

global-merge-offset.ll

[RISCV] Add the GlobalMerge pass (disabled by default)

2022-09-08 18:40:38 -07:00

global-merge.ll

[RISCV] Add the GlobalMerge pass (disabled by default)

2022-09-08 18:40:38 -07:00

half-arith-strict.ll

[RISCV] Codegen support for Zfhmin.

2022-12-06 22:14:15 -08:00

half-arith.ll

[RISCV] Codegen support for Zfhmin.

2022-12-06 22:14:15 -08:00

half-bitmanip-dagcombines.ll

[RISCV] Codegen support for Zfhmin.

2022-12-06 22:14:15 -08:00

half-br-fcmp.ll

[RISCV] Codegen support for Zfhmin.

2022-12-06 22:14:15 -08:00

half-convert-strict.ll

[RISCV] Convert some tests to opaque pointers (NFC)

2022-12-19 13:01:08 +01:00

half-convert.ll

[RISCV] Convert some tests to opaque pointers (NFC)

2022-12-19 13:01:08 +01:00

half-fcmp-strict.ll

[RISCV] Codegen support for Zfhmin.

2022-12-06 22:14:15 -08:00

half-fcmp.ll

[RISCV] Codegen support for Zfhmin.

2022-12-06 22:14:15 -08:00

half-frem.ll

[RISCV] Codegen support for Zfhmin.

2022-12-06 22:14:15 -08:00

half-imm.ll

[RISCV] Codegen support for Zfhmin.

2022-12-06 22:14:15 -08:00

half-intrinsics.ll

[RISCV] Codegen support for Zfhmin.

2022-12-06 22:14:15 -08:00

half-isnan.ll

[RISCV] Codegen support for Zfhmin.

2022-12-06 22:14:15 -08:00

half-mem.ll

[RISCV] Convert some tests to opaque pointers (NFC)

2022-12-19 13:01:08 +01:00

half-round-conv-sat.ll

[RISCV] Codegen support for Zfhmin.

2022-12-06 22:14:15 -08:00

half-round-conv.ll

[RISCV] Codegen support for Zfhmin.

2022-12-06 22:14:15 -08:00

half-select-fcmp.ll

[RISCV] Codegen support for Zfhmin.

2022-12-06 22:14:15 -08:00

half-select-icmp.ll

[RISCV] Codegen support for Zfhmin.

2022-12-06 22:14:15 -08:00

hoist-global-addr-base.ll

[RISCV] Convert some tests to opaque pointers (NFC)

2022-12-19 13:01:08 +01:00

hwasan-check-memaccess.ll

[RISCV] Convert some tests to opaque pointers (NFC)

2022-12-19 13:01:08 +01:00

i32-icmp.ll

[RISCV] Teach RISCVMatInt to prefer li+slli over lui+addi(w) for compressibility.

2022-12-06 10:31:17 -08:00

i64-icmp.ll

[RISCV] Teach RISCVMatInt to prefer li+slli over lui+addi(w) for compressibility.

2022-12-06 10:31:17 -08:00

iabs.ll

[RISCV] Add integer scalar instructions to isAssociativeAndCommutative

2022-12-29 11:43:40 +00:00

imm-cse.ll

[RISCV] Convert some tests to opaque pointers (NFC)

2022-12-19 13:01:08 +01:00

imm.ll

[RISCV] Convert some tests to opaque pointers (NFC)

2022-12-19 13:01:08 +01:00

indirectbr.ll

[RISCV] Convert some tests to opaque pointers (NFC)

2022-12-19 13:01:08 +01:00

init-array.ll

[RISCV] Convert some tests to opaque pointers (NFC)

2022-12-19 13:01:08 +01:00

inline-asm-abi-names.ll

…

inline-asm-clobbers.ll

…

inline-asm-d-abi-names.ll

…

inline-asm-d-constraint-f.ll

[RISCV] Convert some tests to opaque pointers (NFC)

2022-12-19 13:01:08 +01:00

inline-asm-f-abi-names.ll

…

inline-asm-f-constraint-f.ll

[RISCV] Convert some tests to opaque pointers (NFC)

2022-12-19 13:01:08 +01:00

inline-asm-i-constraint-i1.ll

…

inline-asm-invalid.ll

…

inline-asm-S-constraint.ll

[RISCV] Convert some tests to opaque pointers (NFC)

2022-12-19 13:01:08 +01:00

inline-asm-zfh-constraint-f.ll

[RISCV] Convert some tests to opaque pointers (NFC)

2022-12-19 13:01:08 +01:00

inline-asm.ll

[RISCV] Convert some tests to opaque pointers (NFC)

2022-12-19 13:01:08 +01:00

interrupt-attr-args-error.ll

…

interrupt-attr-callee.ll

[RISCV] Convert some tests to opaque pointers (NFC)

2022-12-19 13:01:08 +01:00

interrupt-attr-invalid.ll

…

interrupt-attr-nocall.ll

[RISCV] Convert some tests to opaque pointers (NFC)

2022-12-19 13:01:08 +01:00

interrupt-attr-ret-error.ll

…

interrupt-attr.ll

[RISCV] Convert some tests to opaque pointers (NFC)

2022-12-19 13:01:08 +01:00

isel-optnone.ll

[RISCV] Convert some tests to opaque pointers (NFC)

2022-12-19 13:01:08 +01:00

jumptable.ll

[RISCV] Convert some tests to opaque pointers (NFC)

2022-12-19 13:01:08 +01:00

large-stack.ll

[RISCV] Convert some tests to opaque pointers (NFC)

2022-12-19 13:01:08 +01:00

legalize-fneg.ll

[RISCV] Convert some tests to opaque pointers (NFC)

2022-12-19 13:01:08 +01:00

libcall-tail-calls.ll

[RISCV] Convert some tests to opaque pointers (NFC)

2022-12-19 13:01:08 +01:00

lit.local.cfg

…

live-sp.mir

…

local-stack-slot-allocation.ll

Recommit "[RISCV] Enable the LocalStackSlotAllocation pass support"

2023-01-06 09:54:19 -08:00

loop-strength-reduce-add-cheaper-than-mul.ll

[RISCV] Convert some tests to opaque pointers (NFC)

2022-12-19 13:01:08 +01:00

loop-strength-reduce-loop-invar.ll

[RISCV] Convert test to opaque pointers (NFC)

2022-12-22 15:55:53 +01:00

lsr-legaladdimm.ll

[RISCV] Convert some tests to opaque pointers (NFC)

2022-12-19 13:01:08 +01:00

machine-combiner-mir.ll

[MachineCombiner][RISCV] Add fmadd/fmsub/fnmsub instructions patterns

2022-11-17 13:24:04 +03:00

machine-combiner.ll

[RISCV] Add fmin/fmax scalar instructions to isAssociativeAndCommutative

2022-12-29 11:43:40 +00:00

machine-cp.mir

[MachineCopyPropagation][RISCV] Fix D125335 accidentally change control flow.

2022-06-17 21:40:08 -07:00

machine-cse.ll

[RISCV] Add pass to remove W suffix from ADDIW and SLLIW to improve compressibility

2022-12-22 14:19:26 -08:00

machine-outliner-cfi.mir

…

machine-outliner-patchable.ll

…

machine-outliner-position.mir

…

machine-outliner-throw.ll

[RISCV] Convert some tests to opaque pointers (NFC)

2022-12-19 13:01:08 +01:00

machinelicm-address-pseudos.ll

[RISCV] Convert some tests to opaque pointers (NFC)

2022-12-19 13:01:08 +01:00

machineoutliner-jumptable.mir

…

machineoutliner-pcrel-lo.mir

[RISCV] Don't outline pcrel-lo operand.

2022-08-24 21:47:46 +08:00

machineoutliner.mir

…

MachineSink-implicit-x0.mir

…

macro-fusion-lui-addi.ll

[RISCV] Convert some tests to opaque pointers (NFC)

2022-12-19 13:01:08 +01:00

make-compressible-for-store-address.mir

[RISCV] Fix wrong register rename for store value during make-compressible optimization

2022-07-08 18:07:17 +08:00

make-compressible-rv64.mir

[RISCV] Add pre-emit pass to make more instructions compressible

2022-05-25 09:25:02 +01:00

make-compressible.mir

[RISCV] Add pre-emit pass to make more instructions compressible

2022-05-25 09:25:02 +01:00

mattr-invalid-combination.ll

…

mem64.ll

[RISCV] Convert some tests to opaque pointers (NFC)

2022-12-19 13:01:08 +01:00

mem.ll

[RISCV] Convert some tests to opaque pointers (NFC)

2022-12-19 13:01:08 +01:00

memcpy-inline.ll

[RISCV] Convert some tests to opaque pointers (NFC)

2022-12-19 13:01:08 +01:00

min-max.ll

[RISCV] Match (select C, -1, X)->(or -C, X) during lowerSelect

2022-10-13 09:06:12 -07:00

mir-target-flags.ll

[RISCV] Convert some tests to opaque pointers (NFC)

2022-12-19 13:01:08 +01:00

miss-sp-restore-eh.ll

[RISCV] Fix missing stack pointer recover

2022-06-09 23:38:50 +08:00

module-target-abi2.ll

…

module-target-abi3.ll

[RISCV] Generate correct ELF abi flag when empty .ll file has target-abi attribute

2022-08-26 14:39:39 +08:00

module-target-abi.ll

…

mul.ll

[RISCV] Add integer scalar instructions to isAssociativeAndCommutative

2022-12-29 11:43:40 +00:00

musttail-call.ll

[RISCV] Convert some tests to opaque pointers (NFC)

2022-12-19 13:01:08 +01:00

narrow-shl-cst.ll

[RISCV] Use register allocation hints to improve use of compressed instructions.

2022-11-25 08:39:44 -08:00

neg-abs.ll

[RISCV] Add integer scalar instructions to isAssociativeAndCommutative

2022-12-29 11:43:40 +00:00

nest-register.ll

[RISCV] Add support for static chain

2022-11-09 16:10:32 +08:00

nomerge.ll

…

O0-pipeline.ll

Use-after-return sanitizer binary metadata

2022-12-05 14:40:31 +01:00

O3-pipeline.ll

[RISCV] Add pass to remove W suffix from ADDIW and SLLIW to improve compressibility

2022-12-22 14:19:26 -08:00

option-nopic.ll

[RISCV] Convert some tests to opaque pointers (NFC)

2022-12-19 13:01:08 +01:00

option-norelax.ll

…

option-norvc.ll

…

option-pic.ll

[RISCV] Convert some tests to opaque pointers (NFC)

2022-12-19 13:01:08 +01:00

option-relax.ll

…

option-rvc.ll

…

optnone-store-no-combine.ll

[RISCV] Convert some tests to opaque pointers (NFC)

2022-12-19 13:01:08 +01:00

or-is-add.ll

[RISCV] Prefer ADDI over ORI if the known bits are disjoint.

2022-12-28 19:59:42 -08:00

out-of-reach-emergency-slot.mir

[RISCV] Enable the Machine Late Cleanup pass.

2022-12-11 20:55:05 -08:00

overflow-intrinsic-optimizations.ll

[RISCV] Convert some tests to opaque pointers (NFC)

2022-12-19 13:01:08 +01:00

patchable-function-entry.ll

…

pic-models.ll

[RISCV] Convert some tests to opaque pointers (NFC)

2022-12-19 13:01:08 +01:00

pr40333.ll

…

pr51206.ll

[RISCV] Convert some tests to opaque pointers (NFC)

2022-12-19 13:01:08 +01:00

pr53662.mir

…

pr55201.ll

…

pr56110.ll

[DAGCombiner][ARM][RISCV] Teach ShrinkLoadReplaceStoreWithStore to use truncstore.

2022-06-19 15:50:15 -07:00

pr56457.ll

[TargetLowering][RISCV] Make expandCTLZ work for non-power of 2 types.

2022-07-12 11:36:37 -07:00

pr58025.ll

[RISCV] Convert some tests to opaque pointers (NFC)

2022-12-19 13:01:08 +01:00

pr58286.ll

[RISCV] Convert some tests to opaque pointers (NFC)

2022-12-19 13:01:08 +01:00

pr58511.ll

[RISCV] Add pass to remove W suffix from ADDIW and SLLIW to improve compressibility

2022-12-22 14:19:26 -08:00

prefetch.ll

[RISCV] Convert some tests to opaque pointers (NFC)

2022-12-19 13:01:08 +01:00

readcyclecounter.ll

…

regalloc-last-chance-recoloring-failure.ll

[RISCV] Convert some tests to opaque pointers (NFC)

2022-12-19 13:01:08 +01:00

rem.ll

[RISCV] Add pass to remove W suffix from ADDIW and SLLIW to improve compressibility

2022-12-22 14:19:26 -08:00

remat.ll

[RISCV] Convert some tests to opaque pointers (NFC)

2022-12-19 13:01:08 +01:00

repeated-fp-divisors.ll

[RISCV] Allow conversion of fp divisions to fp multiplications by the reciprocal

2022-12-15 13:00:36 +03:00

reserved-reg-errors.ll

…

reserved-regs.ll

[RISCV] Convert some tests to opaque pointers (NFC)

2022-12-19 13:01:08 +01:00

riscv-codegenprepare-asm.ll

[RISCV] Use register allocation hints to improve use of compressed instructions.

2022-11-25 08:39:44 -08:00

riscv-codegenprepare.ll

[RISCV] Teach RISCVCodeGenPrepare to optimize (i64 (and (zext/sext (i32 X), C1)))

2022-07-17 11:00:56 -07:00

rotl-rotr.ll

[RISCV] Use SUB instead of XOR in lowerShiftLeftParts/lowerShiftRightParts./

2022-12-29 17:04:52 -08:00

rv32e.ll

…

rv32i-rv64i-float-double.ll

…

rv32i-rv64i-half.ll

…

rv32zba.ll

[RISCV] Convert some tests to opaque pointers (NFC)

2022-12-19 13:01:08 +01:00

rv32zbb-intrinsic.ll

…

rv32zbb-zbkb.ll

[RISCV] Teach RISCVDAGToDAGISel::selectShiftMask to bypass adds with constant.

2022-12-29 15:10:36 -08:00

rv32zbb.ll

[RISCV] Add integer scalar instructions to isAssociativeAndCommutative

2022-12-29 11:43:40 +00:00

rv32zbc-intrinsic.ll

…

rv32zbc-zbkc-intrinsic.ll

…

rv32zbkb-intrinsic.ll

…

rv32zbkb.ll

[RISCV] Teach getRegAllocationHints about compressible SRAI/SRLI.

2022-11-30 10:28:57 -08:00

rv32zbkx-intrinsic.ll

…

rv32zbs.ll

[RISCV] Use SUB instead of XOR in lowerShiftLeftParts/lowerShiftRightParts./

2022-12-29 17:04:52 -08:00

rv32zknd-intrinsic.ll

[RISCV][test][NFC] Regenerate RISC-V tests with update_llc_test_checks.py -u

2022-07-13 19:37:34 +01:00

rv32zkne-intrinsic.ll

[RISCV][test][NFC] Regenerate RISC-V tests with update_llc_test_checks.py -u

2022-07-13 19:37:34 +01:00

rv32zknh-intrinsic.ll

[RISCV][test][NFC] Regenerate RISC-V tests with update_llc_test_checks.py -u

2022-07-13 19:37:34 +01:00

rv32zksed-intrinsic.ll

…

rv32zksh-intrinsic.ll

…

rv64-large-stack.ll

[RISCV] Convert some tests to opaque pointers (NFC)

2022-12-19 13:01:08 +01:00

rv64d-double-convert-strict.ll

…

rv64d-double-convert.ll

…

rv64f-float-convert-strict.ll

[RISCV] Set target-abi explicitly to reduce codegen results

2022-06-01 13:49:23 +08:00

rv64f-float-convert.ll

[RISCV] Set target-abi explicitly to reduce codegen results

2022-06-01 13:49:23 +08:00

rv64i-complex-float.ll

[RISCV] Use register allocation hints to improve use of compressed instructions.

2022-11-25 08:39:44 -08:00

rv64i-demanded-bits.ll

[RISCV] Add pass to remove W suffix from ADDIW and SLLIW to improve compressibility

2022-12-22 14:19:26 -08:00

rv64i-double-softfloat.ll

…

rv64i-exhaustive-w-insts.ll

[RISCV] Add pass to remove W suffix from ADDIW and SLLIW to improve compressibility

2022-12-22 14:19:26 -08:00

rv64i-shift-sext.ll

[RISCV] Convert some tests to opaque pointers (NFC)

2022-12-19 13:01:08 +01:00

rv64i-single-softfloat.ll

…

rv64i-tricky-shifts.ll

…

rv64i-w-insts-legalization.ll

[RISCV] Add pass to remove W suffix from ADDIW and SLLIW to improve compressibility

2022-12-22 14:19:26 -08:00

rv64m-exhaustive-w-insts.ll

…

rv64m-w-insts-legalization.ll

…

rv64zba.ll

[RISCV] Add SH1ADD/SH2ADD/SH3ADD to RISCVDAGToDAGISel::hasAllNBitUsers.

2022-12-28 23:38:33 -08:00

rv64zbb-intrinsic.ll

[RISCV] Remove support for the unratified Zbp extension.

2022-09-21 21:22:42 -07:00

rv64zbb-zbkb.ll

[RISCV] Add pass to remove W suffix from ADDIW and SLLIW to improve compressibility

2022-12-22 14:19:26 -08:00

rv64zbb.ll

[RISCV] Add integer scalar instructions to isAssociativeAndCommutative

2022-12-29 11:43:40 +00:00

rv64zbc-intrinsic.ll

…

rv64zbc-zbkc-intrinsic.ll

…

rv64zbkb-intrinsic.ll

…

rv64zbkb.ll

[RISCV] Add pass to remove W suffix from ADDIW and SLLIW to improve compressibility

2022-12-22 14:19:26 -08:00

rv64zbkx-intrinsic.ll

…

rv64zbs.ll

[RISCV] Convert some tests to opaque pointers (NFC)

2022-12-19 13:01:08 +01:00

rv64zfh-half-convert-strict.ll

…

rv64zfh-half-convert.ll

…

rv64zfh-half-intrinsics.ll

…

rv64zfhmin-half-convert-strict.ll

[RISCV] Codegen support for Zfhmin.

2022-12-06 22:14:15 -08:00

rv64zfhmin-half-convert.ll

[RISCV] Codegen support for Zfhmin.

2022-12-06 22:14:15 -08:00

rv64zfhmin-half-intrinsics.ll

[RISCV] Codegen support for Zfhmin.

2022-12-06 22:14:15 -08:00

rv64zknd-intrinsic.ll

[RISCV][test][NFC] Regenerate RISC-V tests with update_llc_test_checks.py -u

2022-07-13 19:37:34 +01:00

rv64zknd-zkne-intrinsic.ll

[RISCV][test][NFC] Regenerate RISC-V tests with update_llc_test_checks.py -u

2022-07-13 19:37:34 +01:00

rv64zkne-intrinsic.ll

[RISCV][test][NFC] Regenerate RISC-V tests with update_llc_test_checks.py -u

2022-07-13 19:37:34 +01:00

rv64zknh-intrinsic.ll

[RISCV][test][NFC] Regenerate RISC-V tests with update_llc_test_checks.py -u

2022-07-13 19:37:34 +01:00

rv64zksed-intrinsic.ll

…

rv64zksh-intrinsic.ll

…

sadd_sat_plus.ll

[RISCV] Add integer scalar instructions to isAssociativeAndCommutative

2022-12-29 11:43:40 +00:00

sadd_sat.ll

[RISCV] Add integer scalar instructions to isAssociativeAndCommutative

2022-12-29 11:43:40 +00:00

saverestore.ll

[RISCV] Convert some tests to opaque pointers (NFC)

2022-12-19 13:01:08 +01:00

scalable-vector-struct.ll

…

sdata-limit-0.ll

…

sdata-limit-4.ll

…

sdata-limit-8.ll

…

sdata-local-sym.ll

…

select-and.ll

[RISCV] Remove support for the unratified Zbt extension.

2022-09-20 20:26:48 -07:00

select-bare.ll

[RISCV] Remove support for the unratified Zbt extension.

2022-09-20 20:26:48 -07:00

select-binop-identity.ll

[RISCV] Add integer scalar instructions to isAssociativeAndCommutative

2022-12-29 11:43:40 +00:00

select-cc.ll

[RISCV] Convert some tests to opaque pointers (NFC)

2022-12-19 13:01:08 +01:00

select-const.ll

[RISCV] Branchless lowering for (select (x < 0), TrueConstant, FalseConstant) and (select (x >= 0), TrueConstant, FalseConstant)

2022-11-25 20:18:30 +08:00

select-constant-xor.ll

[RISCV] Add RISCV::XORI to RISCVDAGToDAGISel::hasAllNBitUsers.

2022-12-28 15:17:41 -08:00

select-optimize-multiple.ll

[RISCV] Add ANDI to getRegAllocationHints.

2022-11-30 20:59:02 -08:00

select-optimize-multiple.mir

[RISCV] Remove support for the unratified Zbt extension.

2022-09-20 20:26:48 -07:00

select-or.ll

[RISCV] Remove support for the unratified Zbt extension.

2022-09-20 20:26:48 -07:00

select.ll

[RISCV] Add more XVentanaCondOps patterns.

2023-01-06 08:29:23 -08:00

selectcc-to-shiftand.ll

[RISCV] Match neg (and x, 1) to two shifts to improve codesize

2022-12-19 14:17:26 -08:00

setcc-logic.ll

[RISCV] Add ADDW/AND/OR/XOR/SUB/SUBW to getRegAllocHints.

2022-12-01 11:09:38 -08:00

sext-zext-trunc.ll

[RISCV] Match neg (and x, 1) to two shifts to improve codesize

2022-12-19 14:17:26 -08:00

sextw-removal.ll

[RISCV] Add pass to remove W suffix from ADDIW and SLLIW to improve compressibility

2022-12-22 14:19:26 -08:00

shadowcallstack.ll

[RISCV] Add integer scalar instructions to isAssociativeAndCommutative

2022-12-29 11:43:40 +00:00

shift-amount-mod.ll

[RISCV] Use SUB instead of XOR in lowerShiftLeftParts/lowerShiftRightParts./

2022-12-29 17:04:52 -08:00

shift-and.ll

[RISCV] Make sure we always call tryShrinkShlLogicImm for ISD:AND during isel.

2022-10-22 14:30:13 -07:00

shift-masked-shamt.ll

[RISCV] Use SUB instead of XOR in lowerShiftLeftParts/lowerShiftRightParts./

2022-12-29 17:04:52 -08:00

shifts.ll

[RISCV] Use SUB instead of XOR in lowerShiftLeftParts/lowerShiftRightParts./

2022-12-29 17:04:52 -08:00

shl-demanded.ll

[RISCV] Convert some tests to opaque pointers (NFC)

2022-12-19 13:01:08 +01:00

shlimm-addimm.ll

[RISCV] Add pass to remove W suffix from ADDIW and SLLIW to improve compressibility

2022-12-22 14:19:26 -08:00

short-foward-branch-opt.ll

[RISCV] Support the short-forward-branch predicated ops in RISCVSExtWRemoval.

2022-12-23 21:39:22 -08:00

shrinkwrap.ll

[RISCV] Convert some tests to opaque pointers (NFC)

2022-12-19 13:01:08 +01:00

shuffle-reverse.ll

[RISCV] Use tail agnostic if inserting subvector/element at the end of a vector.

2022-12-31 11:29:09 +08:00

signbit-test.ll

[AArch64][RISCV][x86] add tests for masked val equality with 0; NFC

2022-12-06 11:34:48 -05:00

sink-icmp.ll

[RISCV] Convert some tests to opaque pointers (NFC)

2022-12-19 13:01:08 +01:00

spill-fpr-scalar.ll

[RISCV][InsertVSETVLI] Default to MA not MU

2022-10-06 07:59:39 -07:00

split-offsets.ll

[RISCV] Convert some tests to opaque pointers (NFC)

2022-12-19 13:01:08 +01:00

split-sp-adjust.ll

[RISCV] Convert some tests to opaque pointers (NFC)

2022-12-19 13:01:08 +01:00

split-udiv-by-constant.ll

[RISCV] Add integer scalar instructions to isAssociativeAndCommutative

2022-12-29 11:43:40 +00:00

split-urem-by-constant.ll

Recommit "[TargetLowering][RISCV][X86] Support even divisors in expandDIVREMByConstant."

2022-10-24 10:08:50 -07:00

srem-lkk.ll

[RISCV] Add integer scalar instructions to isAssociativeAndCommutative

2022-12-29 11:43:40 +00:00

srem-seteq-illegal-types.ll

[RISCV] Add integer scalar instructions to isAssociativeAndCommutative

2022-12-29 11:43:40 +00:00

srem-vector-lkk.ll

[RISCV] Add integer scalar instructions to isAssociativeAndCommutative

2022-12-29 11:43:40 +00:00

ssub_sat_plus.ll

[RISCV] Add integer scalar instructions to isAssociativeAndCommutative

2022-12-29 11:43:40 +00:00

ssub_sat.ll

[RISCV] Add integer scalar instructions to isAssociativeAndCommutative

2022-12-29 11:43:40 +00:00

stack-folding.ll

[RISCV] Add sext.b/h and zext.b/h/w to RISCVInstrInfo::foldMemoryOperandImpl.

2022-07-21 14:54:58 -07:00

stack-realignment-with-variable-sized-objects.ll

[RISCV] Convert some tests to opaque pointers (NFC)

2022-12-19 13:01:08 +01:00

stack-realignment.ll

[RISCV] Convert some tests to opaque pointers (NFC)

2022-12-19 13:01:08 +01:00

stack-slot-size.ll

[RISCV] Convert some tests to opaque pointers (NFC)

2022-12-19 13:01:08 +01:00

stack-store-check.ll

[RISCV] Convert some tests to opaque pointers (NFC)

2022-12-19 13:01:08 +01:00

subtarget-features-std-ext.ll

…

switch-width.ll

[riscv] Add a bunch of tests exploring switch lowering

2022-05-11 13:16:31 -07:00

tagged-globals.ll

[RISCV] Convert some tests to opaque pointers (NFC)

2022-12-19 13:01:08 +01:00

tail-calls.ll

[RISCV] Convert some tests to opaque pointers (NFC)

2022-12-19 13:01:08 +01:00

target-abi-invalid.ll

…

target-abi-valid.ll

…

thread-pointer.ll

[RISCV] Convert some tests to opaque pointers (NFC)

2022-12-19 13:01:08 +01:00

tls-models.ll

[RISCV] Convert some tests to opaque pointers (NFC)

2022-12-19 13:01:08 +01:00

trunc-free.ll

[RISCV] Convert some tests to opaque pointers (NFC)

2022-12-19 13:01:08 +01:00

uadd_sat_plus.ll

[RISCV] Add integer scalar instructions to isAssociativeAndCommutative

2022-12-29 11:43:40 +00:00

uadd_sat.ll

[RISCV] Add integer scalar instructions to isAssociativeAndCommutative

2022-12-29 11:43:40 +00:00

umulo-128-legalisation-lowering.ll

[RISCV] Add integer scalar instructions to isAssociativeAndCommutative

2022-12-29 11:43:40 +00:00

unaligned-load-store.ll

[RISCV] Add integer scalar instructions to isAssociativeAndCommutative

2022-12-29 11:43:40 +00:00

unfold-masked-merge-scalar-variablemask.ll

[RISCV] Add ADDW/AND/OR/XOR/SUB/SUBW to getRegAllocHints.

2022-12-01 11:09:38 -08:00

unroll-loop-cse.ll

[RISCV] Convert some tests to opaque pointers (NFC)

2022-12-19 13:01:08 +01:00

urem-lkk.ll

[RISCV] Add integer scalar instructions to isAssociativeAndCommutative

2022-12-29 11:43:40 +00:00

urem-seteq-illegal-types.ll

[RISCV] Add integer scalar instructions to isAssociativeAndCommutative

2022-12-29 11:43:40 +00:00

urem-vector-lkk.ll

[TargetLowering] Teach BuildUDIV to take advantage of leading zeros in the dividend.

2022-12-29 13:58:46 -08:00

usub_sat_plus.ll

[RISCV] Add integer scalar instructions to isAssociativeAndCommutative

2022-12-29 11:43:40 +00:00

usub_sat.ll

[RISCV] Add integer scalar instructions to isAssociativeAndCommutative

2022-12-29 11:43:40 +00:00

vadd-vp-mask.ll

[RISCV][InsertVSETVLI] Default to MA not MU

2022-10-06 07:59:39 -07:00

vararg.ll

[RISCV] Add integer scalar instructions to isAssociativeAndCommutative

2022-12-29 11:43:40 +00:00

vec3-setcc-crash.ll

[RISCV] Add pass to remove W suffix from ADDIW and SLLIW to improve compressibility

2022-12-22 14:19:26 -08:00

vector-abi.ll

…

verify-instr.mir

…

vlenb.ll

Teach PeepholeOpt to eliminate redundant copy from constant physreg (e.g VLENB on RISCV)

2022-05-16 16:38:30 -07:00

vmul-vp-mask.ll

[RISCV][InsertVSETVLI] Default to MA not MU

2022-10-06 07:59:39 -07:00

vsub-vp-mask.ll

[RISCV][InsertVSETVLI] Default to MA not MU

2022-10-06 07:59:39 -07:00

wide-mem.ll

[RISCV] Convert some tests to opaque pointers (NFC)

2022-12-19 13:01:08 +01:00

wide-scalar-shift-by-byte-multiple-legalization.ll

[RISCV] Use SUB instead of XOR in lowerShiftLeftParts/lowerShiftRightParts./

2022-12-29 17:04:52 -08:00

wide-scalar-shift-legalization.ll

[RISCV] Use SUB instead of XOR in lowerShiftLeftParts/lowerShiftRightParts./

2022-12-29 17:04:52 -08:00

xaluo.ll

[RISCV] Add integer scalar instructions to isAssociativeAndCommutative

2022-12-29 11:43:40 +00:00

xventanacondops.ll

[RISCV] Add more XVentanaCondOps patterns.

2023-01-06 08:29:23 -08:00

zbb-cmp-combine.ll

[RISCV] Combine comparison and logic ops

2022-12-23 17:10:21 +03:00

zext-with-load-is-free.ll

[RISCV] Convert some tests to opaque pointers (NFC)

2022-12-19 13:01:08 +01:00

zfh-half-intrinsics-strict.ll

[LegalizeTypes][RISCV] Support f16 in ExpandIntRes_LLROUND_LLRINT.

2022-09-26 11:09:33 -07:00

zfh-half-intrinsics.ll

…

zfh-imm.ll

[RISCV] Convert some tests to opaque pointers (NFC)

2022-12-19 13:01:08 +01:00

zfhmin-half-intrinsics-strict.ll

[RISCV] Codegen support for Zfhmin.

2022-12-06 22:14:15 -08:00

zfhmin-half-intrinsics.ll

[RISCV] Codegen support for Zfhmin.

2022-12-06 22:14:15 -08:00

zfhmin-imm.ll

[RISCV] Convert some tests to opaque pointers (NFC)

2022-12-19 13:01:08 +01:00

zmmul.ll

[RISCV][Clang] Add support for Zmmul extension

2022-07-18 20:26:08 -04:00