Certain 32 bit constants can be generated with a single instruction instead of two. Implement materialize32BitImm function for MIPS32. Differential Revision: https://reviews.llvm.org/D59369 llvm-svn: 356238
71 lines
2.1 KiB
YAML
71 lines
2.1 KiB
YAML
# NOTE: Assertions have been autogenerated by utils/update_mir_test_checks.py
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# RUN: llc -O0 -mtriple=mipsel-linux-gnu -run-pass=instruction-select -verify-machineinstrs %s -o - | FileCheck %s -check-prefixes=MIPS32
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--- |
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define i32 @test_i32(i1 %cnd, i32 %a, i32 %b) {
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entry:
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br i1 %cnd, label %cond.true, label %cond.false
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cond.true: ; preds = %entry
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br label %cond.end
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cond.false: ; preds = %entry
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br label %cond.end
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cond.end: ; preds = %cond.false, %cond.true
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%cond = phi i32 [ %a, %cond.true ], [ %b, %cond.false ]
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ret i32 %cond
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}
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...
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---
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name: test_i32
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alignment: 2
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legalized: true
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regBankSelected: true
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tracksRegLiveness: true
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body: |
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; MIPS32-LABEL: name: test_i32
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; MIPS32: bb.0.entry:
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; MIPS32: successors: %bb.1(0x40000000), %bb.2(0x40000000)
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; MIPS32: liveins: $a0, $a1, $a2
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; MIPS32: [[COPY:%[0-9]+]]:gpr32 = COPY $a0
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; MIPS32: [[COPY1:%[0-9]+]]:gpr32 = COPY $a1
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; MIPS32: [[COPY2:%[0-9]+]]:gpr32 = COPY $a2
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; MIPS32: [[ORi:%[0-9]+]]:gpr32 = ORi $zero, 1
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; MIPS32: [[AND:%[0-9]+]]:gpr32 = AND [[COPY]], [[ORi]]
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; MIPS32: BNE [[AND]], $zero, %bb.1, implicit-def $at
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; MIPS32: J %bb.2, implicit-def $at
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; MIPS32: bb.1.cond.true:
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; MIPS32: successors: %bb.3(0x80000000)
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; MIPS32: J %bb.3, implicit-def $at
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; MIPS32: bb.2.cond.false:
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; MIPS32: successors: %bb.3(0x80000000)
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; MIPS32: bb.3.cond.end:
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; MIPS32: [[PHI:%[0-9]+]]:gpr32 = PHI [[COPY1]], %bb.1, [[COPY2]], %bb.2
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; MIPS32: $v0 = COPY [[PHI]]
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; MIPS32: RetRA implicit $v0
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bb.1.entry:
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liveins: $a0, $a1, $a2
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%3:gprb(s32) = COPY $a0
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%1:gprb(s32) = COPY $a1
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%2:gprb(s32) = COPY $a2
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%6:gprb(s32) = G_CONSTANT i32 1
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%7:gprb(s32) = COPY %3(s32)
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%5:gprb(s32) = G_AND %7, %6
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G_BRCOND %5(s32), %bb.2
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G_BR %bb.3
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bb.2.cond.true:
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G_BR %bb.4
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bb.3.cond.false:
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bb.4.cond.end:
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%4:gprb(s32) = G_PHI %1(s32), %bb.2, %2(s32), %bb.3
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$v0 = COPY %4(s32)
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RetRA implicit $v0
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...
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