Jianjian Guan 3259768557 [RISCV] Remove experimental for bf16 extensions (#97996) ...

They are already ratified now.

2024-07-09 14:34:03 +08:00

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AArch64

[llvm][AArch64] Fix a crash with an incorrect asm constraint (#98071)

2024-07-08 14:00:29 -07:00

AMDGPU

[AMDGPU] Update EXECZ retention in SIPreEmitPeephole for GFX10/12 (#97676)

2024-07-09 14:44:31 +09:00

ARC

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ARM

[LegalizeDAG] Optimize CodeGen for ISD::CTLZ_ZERO_UNDEF (#83039)

2024-07-08 14:01:32 +01:00

AVR

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BPF

[BPF] Fix linking issues in static map initializers (#91310)

2024-07-05 07:32:09 -07:00

CSKY

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DirectX

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Generic

Revert "[CodeGen][NewPM] Port machine-branch-prob to new pass manager" (#96858)

2024-06-27 15:00:17 +08:00

Hexagon

[LegalizeDAG] Optimize CodeGen for ISD::CTLZ_ZERO_UNDEF (#83039)

2024-07-08 14:01:32 +01:00

Inputs

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Lanai

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LoongArch

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M68k

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Mips

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MIR

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MLRegAlloc

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MSP430

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NVPTX

[NVPTX] Support inline asm with 128-bit operand in NVPTX backend (#97113)

2024-07-01 16:30:33 -07:00

PowerPC

[PowerPC] Function descriptor symbol may be omitted for external symbol. #97526

2024-07-08 03:47:33 -04:00

RISCV

[RISCV] Remove experimental for bf16 extensions (#97996)

2024-07-09 14:34:03 +08:00

SPARC

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SPIRV

[SPIR-V] Add __spirv_ wrappers to Non-Uniform, Atomic, Convert Instructions (#96790)

2024-07-04 07:29:21 +02:00

SystemZ

[LegalizeDAG] Optimize CodeGen for ISD::CTLZ_ZERO_UNDEF (#83039)

2024-07-08 14:01:32 +01:00

Thumb

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Thumb2

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VE

[LegalizeDAG] Optimize CodeGen for ISD::CTLZ_ZERO_UNDEF (#83039)

2024-07-08 14:01:32 +01:00

WebAssembly

[WebAssembly] Update generic and bleeding-edge CPUs (#96584)

2024-07-01 19:12:01 -07:00

WinCFGuard

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WinEH

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X86

[CodeGen][NewPM] Port SlotIndexes to new pass manager (#97941)

2024-07-09 12:09:11 +08:00

XCore

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Xtensa

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