Files
clang-p2996/llvm/lib/Target/XCore
Bill Wendling 999dacc55b Don't cache the instruction and register info from the TargetMachine, because
the internals of TargetMachine could change.

No functionality change intended.

llvm-svn: 183572
2013-06-07 21:04:35 +00:00
..
2012-12-16 17:29:14 +00:00

To-do
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* Instruction encodings
* Tailcalls
* Investigate loop alignment
* Add builtins