d313614b60
Since https://github.com/ARM-software/acle/pull/276 the ACLE defines attributes to better describe the use of a given SME state. Previously the attributes merely described the possibility of it being 'shared' or 'preserved', whereas the new attributes have more semantics and also describe how the data flows through the program. For ZT0 we already had to add new LLVM IR attributes: * aarch64_new_zt0 * aarch64_in_zt0 * aarch64_out_zt0 * aarch64_inout_zt0 * aarch64_preserves_zt0 We have now done the same for ZA, such that we add: * aarch64_new_za (previously `aarch64_pstate_za_new`) * aarch64_in_za (more specific variation of `aarch64_pstate_za_shared`) * aarch64_out_za (more specific variation of `aarch64_pstate_za_shared`) * aarch64_inout_za (more specific variation of `aarch64_pstate_za_shared`) * aarch64_preserves_za (previously `aarch64_pstate_za_shared, aarch64_pstate_za_preserved`) This explicitly removes 'pstate' from the name, because with SME2 and the new ACLE attributes there is a difference between "sharing ZA" (sharing the ZA matrix register with the caller) and "sharing PSTATE.ZA" (sharing either the ZA or ZT0 register, both part of PSTATE.ZA with the caller).
66 lines
2.5 KiB
LLVM
66 lines
2.5 KiB
LLVM
; RUN: opt -S -mtriple=aarch64-linux-gnu -aarch64-sme-abi %s | FileCheck %s
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; RUN: opt -S -mtriple=aarch64-linux-gnu -aarch64-sme-abi -aarch64-sme-abi %s | FileCheck %s
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declare void @shared_za_callee() "aarch64_inout_za"
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define void @private_za() "aarch64_new_za" {
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; CHECK-LABEL: @private_za(
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; CHECK-NEXT: prelude:
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; CHECK-NEXT: [[TPIDR2:%.*]] = call i64 @llvm.aarch64.sme.get.tpidr2()
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; CHECK-NEXT: [[CMP:%.*]] = icmp ne i64 [[TPIDR2]], 0
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; CHECK-NEXT: br i1 [[CMP]], label [[SAVE_ZA:%.*]], label [[TMP0:%.*]]
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; CHECK: save.za:
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; CHECK-NEXT: call aarch64_sme_preservemost_from_x0 void @__arm_tpidr2_save()
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; CHECK-NEXT: call void @llvm.aarch64.sme.set.tpidr2(i64 0)
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; CHECK-NEXT: br label [[TMP0]]
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; CHECK: 0:
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; CHECK-NEXT: call void @llvm.aarch64.sme.za.enable()
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; CHECK-NEXT: call void @llvm.aarch64.sme.zero(i32 255)
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; CHECK-NEXT: call void @shared_za_callee()
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; CHECK-NEXT: call void @llvm.aarch64.sme.za.disable()
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; CHECK-NEXT: ret void
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;
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call void @shared_za_callee()
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ret void
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}
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define i32 @private_za_multiple_exit(i32 %a, i32 %b, i64 %cond) "aarch64_new_za" {
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; CHECK-LABEL: @private_za_multiple_exit(
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; CHECK-NEXT: prelude:
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; CHECK-NEXT: [[TPIDR2:%.*]] = call i64 @llvm.aarch64.sme.get.tpidr2()
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; CHECK-NEXT: [[CMP:%.*]] = icmp ne i64 [[TPIDR2]], 0
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; CHECK-NEXT: br i1 [[CMP]], label [[SAVE_ZA:%.*]], label [[ENTRY:%.*]]
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; CHECK: save.za:
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; CHECK-NEXT: call aarch64_sme_preservemost_from_x0 void @__arm_tpidr2_save()
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; CHECK-NEXT: call void @llvm.aarch64.sme.set.tpidr2(i64 0)
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; CHECK-NEXT: br label [[ENTRY]]
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; CHECK: entry:
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; CHECK-NEXT: call void @llvm.aarch64.sme.za.enable()
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; CHECK-NEXT: call void @llvm.aarch64.sme.zero(i32 255)
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; CHECK-NEXT: [[TOBOOL:%.*]] = icmp eq i64 [[COND:%.*]], 1
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; CHECK-NEXT: br i1 [[TOBOOL]], label [[IF_ELSE:%.*]], label [[IF_END:%.*]]
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; CHECK: if.else:
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; CHECK-NEXT: [[ADD:%.*]] = add i32 [[A:%.*]], [[B:%.*]]
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; CHECK-NEXT: call void @llvm.aarch64.sme.za.disable()
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; CHECK-NEXT: ret i32 [[ADD]]
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; CHECK: if.end:
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; CHECK-NEXT: [[SUB:%.*]] = sub i32 [[A]], [[B]]
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; CHECK-NEXT: call void @llvm.aarch64.sme.za.disable()
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; CHECK-NEXT: ret i32 [[SUB]]
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;
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entry:
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%tobool = icmp eq i64 %cond, 1
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br i1 %tobool, label %if.else, label %if.end
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if.else:
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%add = add i32 %a, %b
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ret i32 %add
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if.end:
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%sub = sub i32 %a, %b
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ret i32 %sub
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}
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; CHECK: declare void @__arm_tpidr2_save() #[[ATTR:[0-9]+]]
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; CHECK: attributes #[[ATTR]] = { "aarch64_pstate_sm_compatible" }
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