837dab96d6
This adds a new test fixture class FEnvSafeTest (usable as a base class for other fixtures) that ensures each test doesn't perturb the `fenv_t` state that the next test will start with. It also provides types and methods tests can use to explicitly wrap code under test either to check that it doesn't perturb the state or to save and restore the state around particular test code. All the fenv and math tests are updated to use this so that none can affect another. Expectations that code under test and/or tests themselves don't perturb state can be added later.
78 lines
3.2 KiB
C++
78 lines
3.2 KiB
C++
//===-- Unittests for feraiseexcept with exceptions enabled ---------------===//
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//
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// Part of the LLVM Project, under the Apache License v2.0 with LLVM Exceptions.
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// See https://llvm.org/LICENSE.txt for license information.
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// SPDX-License-Identifier: Apache-2.0 WITH LLVM-exception
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//
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//===----------------------------------------------------------------------===//
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#include "src/fenv/feclearexcept.h"
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#include "src/fenv/feraiseexcept.h"
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#include "src/fenv/fetestexcept.h"
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#include "src/__support/FPUtil/FEnvImpl.h"
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#include "src/__support/macros/properties/architectures.h"
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#include "test/UnitTest/FEnvSafeTest.h"
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#include "test/UnitTest/FPExceptMatcher.h"
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#include "test/UnitTest/Test.h"
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#include "hdr/fenv_macros.h"
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#include <signal.h>
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#include "excepts.h"
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using LlvmLibcExceptionStatusTest = LIBC_NAMESPACE::testing::FEnvSafeTest;
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// This test enables an exception and verifies that raising that exception
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// triggers SIGFPE.
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TEST_F(LlvmLibcExceptionStatusTest, RaiseAndCrash) {
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#if defined(LIBC_TARGET_ARCH_IS_ANY_ARM) || \
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defined(LIBC_TARGET_ARCH_IS_ANY_RISCV)
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// Few Arm HW implementations do not trap exceptions. We skip this test
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// completely on such HW.
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//
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// Whether HW supports trapping exceptions or not is deduced by enabling an
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// exception and reading back to see if the exception got enabled. If the
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// exception did not get enabled, then it means that the HW does not support
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// trapping exceptions.
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LIBC_NAMESPACE::fputil::disable_except(FE_ALL_EXCEPT);
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LIBC_NAMESPACE::fputil::enable_except(FE_DIVBYZERO);
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if (LIBC_NAMESPACE::fputil::get_except() == 0)
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return;
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#endif // Architectures where exception trapping is not supported
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// TODO: Install a floating point exception handler and verify that the
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// the expected exception was raised. One will have to longjmp back from
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// that exception handler, so such a testing can be done after we have
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// longjmp implemented.
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for (int e : EXCEPTS) {
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LIBC_NAMESPACE::fputil::disable_except(FE_ALL_EXCEPT);
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LIBC_NAMESPACE::fputil::enable_except(e);
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ASSERT_EQ(LIBC_NAMESPACE::feclearexcept(FE_ALL_EXCEPT), 0);
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// Raising all exceptions except |e| should not call the
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// SIGFPE handler. They should set the exception flag though,
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// so we verify that. Since other exceptions like FE_DIVBYZERO
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// can raise FE_INEXACT as well, we don't verify the other
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// exception flags when FE_INEXACT is enabled.
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if (e != FE_INEXACT) {
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int others = ALL_EXCEPTS & ~e;
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ASSERT_EQ(LIBC_NAMESPACE::feraiseexcept(others), 0);
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ASSERT_EQ(LIBC_NAMESPACE::fetestexcept(others), others);
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}
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ASSERT_RAISES_FP_EXCEPT([=] {
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// In test frameworks like Fuchsia's zxtest, this translates to
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// a death test which runs this closure in a different thread. So,
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// we enable the exception again inside this closure so that the
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// exception gets enabled for the thread running this closure.
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LIBC_NAMESPACE::fputil::enable_except(e);
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LIBC_NAMESPACE::feraiseexcept(e);
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});
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// Cleanup.
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LIBC_NAMESPACE::fputil::disable_except(FE_ALL_EXCEPT);
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ASSERT_EQ(LIBC_NAMESPACE::feclearexcept(FE_ALL_EXCEPT), 0);
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}
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}
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