Shilei Tian 6548b6354d Reapply "[AMDGPU] Still set up the two SGPRs for queue ptr even it is COV5 (#112403)" ...

This reverts commit ca33649abe.

2024-11-08 20:21:16 -05:00

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AMDGPU

Reapply "[AMDGPU] Still set up the two SGPRs for queue ptr even it is COV5 (#112403)"

2024-11-08 20:21:16 -05:00

NVPTX

[NVPTX] Add TTI support for folding isspacep in InferAS (#114486)

2024-11-07 17:18:30 -08:00

X86

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fake-use.ll

InferAddressSpaces: Handle llvm.fake.use (#109567)

2024-10-09 09:24:37 +04:00

masked-gather-scatter.ll

[LLVM][IR] Use splat syntax when printing Constant[Data]Vector. (#112548)

2024-11-06 11:53:33 +00:00

optnone-func-unchanged.ll

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vector-of-pointers.ll

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