50ad3478bd
Most tests passed with an extra argument to explicitly enable the pass. One does not, deleted it as part of this change. I can't see why the codegen would be different between default on and default off but switched on. It can be retrieved from the project history. This would be a revert, but git revert was not clean. Disabling the pass and leaving it in tree is less likely to cause breakage elsewhere than patching up the git revert conflicts on unfamiliar code. It'll be landed without review, as @hsmhsm is believed unavailable at present. Differential Revision: https://reviews.llvm.org/D104962
55 lines
2.3 KiB
LLVM
55 lines
2.3 KiB
LLVM
; RUN: opt -S -mtriple=amdgcn-- -amdgpu-replace-lds-use-with-pointer -amdgpu-enable-lds-replace-with-pointer=true < %s | FileCheck %s
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; DESCRIPTION:
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;
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; There is one lds global defined here, and this lds is used within a single non-kernel
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; function, as an operand of nested constant expression, and this non-kernel function is
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; reachable from kernel. Hence nested constant expression should to be converted into a
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; series of instructons and pointer replacement should take place.
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;
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; Original LDS should exist.
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; CHECK: @used_only_within_func = addrspace(3) global [4 x i32] undef, align 4
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@used_only_within_func = addrspace(3) global [4 x i32] undef, align 4
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; Pointers should be created.
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; CHECK: @used_only_within_func.ptr = internal unnamed_addr addrspace(3) global i16 undef, align 2
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; Pointer replacement code should be added.
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define void @f0(i32 %x) {
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; CHECK-LABEL: entry:
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; CHECK: %0 = load i16, i16 addrspace(3)* @used_only_within_func.ptr, align 2
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; CHECK: %1 = getelementptr i8, i8 addrspace(3)* null, i16 %0
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; CHECK: %2 = bitcast i8 addrspace(3)* %1 to [4 x i32] addrspace(3)*
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; CHECK: %3 = getelementptr inbounds [4 x i32], [4 x i32] addrspace(3)* %2, i32 0, i32 0
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; CHECK: %4 = addrspacecast i32 addrspace(3)* %3 to i32*
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; CHECK: %5 = ptrtoint i32* %4 to i64
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; CHECK: %6 = add i64 %5, %5
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; CHECK: %7 = inttoptr i64 %6 to i32*
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; CHECK: store i32 %x, i32* %7, align 4
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; CHECK: ret void
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entry:
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store i32 %x, i32* inttoptr (i64 add (i64 ptrtoint (i32* addrspacecast (i32 addrspace(3)* bitcast ([4 x i32] addrspace(3)* @used_only_within_func to i32 addrspace(3)*) to i32*) to i64), i64 ptrtoint (i32* addrspacecast (i32 addrspace(3)* bitcast ([4 x i32] addrspace(3)* @used_only_within_func to i32 addrspace(3)*) to i32*) to i64)) to i32*), align 4
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ret void
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}
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; Pointer initialization code shoud be added
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define amdgpu_kernel void @k0() {
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; CHECK-LABEL: entry:
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; CHECK: %0 = call i32 @llvm.amdgcn.mbcnt.lo(i32 -1, i32 0)
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; CHECK: %1 = icmp eq i32 %0, 0
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; CHECK: br i1 %1, label %2, label %3
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;
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; CHECK-LABEL: 2:
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; CHECK: store i16 ptrtoint ([4 x i32] addrspace(3)* @used_only_within_func to i16), i16 addrspace(3)* @used_only_within_func.ptr, align 2
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; CHECK: br label %3
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;
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; CHECK-LABEL: 3:
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; CHECK: call void @llvm.amdgcn.wave.barrier()
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; CHECK: call void @f0(i32 0)
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; CHECK: ret void
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entry:
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call void @f0(i32 0)
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ret void
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}
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