2a814cd9e1
This PR implements the function splitBasicBlockBefore to address an
issue
that occurred during SplitEdge(BB, Succ, ...), inside splitBlockBefore.
The issue occurs in SplitEdge when the Succ has a single predecessor
and the edge between the BB and Succ is not critical. This produces
the result ‘BB->Succ->New’. The new function splitBasicBlockBefore
was added to splitBlockBefore to handle the issue and now produces
the correct result ‘BB->New->Succ’.
Below is an example of splitting the block bb1 at its first instruction.
/// Original IR
bb0:
br bb1
bb1:
%0 = mul i32 1, 2
br bb2
bb2:
/// IR after splitEdge(bb0, bb1) using splitBasicBlock
bb0:
br bb1
bb1:
br bb1.split
bb1.split:
%0 = mul i32 1, 2
br bb2
bb2:
/// IR after splitEdge(bb0, bb1) using splitBasicBlockBefore
bb0:
br bb1.split
bb1.split
br bb1
bb1:
%0 = mul i32 1, 2
br bb2
bb2:
Differential Revision: https://reviews.llvm.org/D92200
96 lines
3.5 KiB
LLVM
96 lines
3.5 KiB
LLVM
; REQUIRES: asserts
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; RUN: opt -loop-unswitch -enable-new-pm=0 -disable-output -stats -info-output-file - < %s | FileCheck --check-prefix=STATS %s
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; RUN: opt -S -loop-unswitch -enable-new-pm=0 -verify-loop-info -verify-dom-info < %s | FileCheck %s
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; RUN: opt -S -loop-unswitch -enable-new-pm=0 -verify-loop-info -verify-dom-info -enable-mssa-loop-dependency=true -verify-memoryssa < %s | FileCheck %s
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; STATS: 2 loop-unswitch - Number of switches unswitched
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; CHECK: %1 = icmp eq i32 %c, 1
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; CHECK-NEXT: br i1 %1, label %.split.us, label %..split_crit_edge
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; CHECK: ..split_crit_edge: ; preds = %0
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; CHECK-NEXT: br label %.split
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; CHECK: .split.us: ; preds = %0
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; CHECK-NEXT: br label %loop_begin.us
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; CHECK: loop_begin.us: ; preds = %loop_begin.backedge.us, %.split.us
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; CHECK-NEXT: %var_val.us = load i32, i32* %var
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; CHECK-NEXT: switch i32 1, label %default.us-lcssa.us [
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; CHECK-NEXT: i32 1, label %inc.us
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; CHECK: inc.us: ; preds = %loop_begin.us
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; CHECK-NEXT: call void @incf() [[NOR_NUW:#[0-9]+]]
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; CHECK-NEXT: br label %loop_begin.backedge.us
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; CHECK: .split: ; preds = %..split_crit_edge
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; CHECK-NEXT: %2 = icmp eq i32 %c, 2
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; CHECK-NEXT: br i1 %2, label %.split.split.us, label %.split..split.split_crit_edge
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; CHECK: .split..split.split_crit_edge: ; preds = %.split
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; CHECK-NEXT: br label %.split.split
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; CHECK: .split.split.us: ; preds = %.split
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; CHECK-NEXT: br label %loop_begin.us1
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; CHECK: loop_begin.us1: ; preds = %loop_begin.backedge.us5, %.split.split.us
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; CHECK-NEXT: %var_val.us2 = load i32, i32* %var
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; CHECK-NEXT: switch i32 2, label %default.us-lcssa.us-lcssa.us [
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; CHECK-NEXT: i32 1, label %inc.split.us
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; CHECK-NEXT: i32 2, label %dec.us3
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; CHECK-NEXT: ]
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; CHECK: dec.us3: ; preds = %loop_begin.us1
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; CHECK-NEXT: call void @decf() [[NOR_NUW]]
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; CHECK-NEXT: br label %loop_begin.backedge.us5
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; CHECK: .split.split: ; preds = %.split..split.split_crit_edge
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; CHECK-NEXT: br label %loop_begin
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; CHECK: loop_begin: ; preds = %loop_begin.backedge, %.split.split
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; CHECK-NEXT: %var_val = load i32, i32* %var
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; CHECK-NEXT: switch i32 %c, label %default.us-lcssa.us-lcssa [
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; CHECK-NEXT: i32 1, label %inc.split
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; CHECK-NEXT: i32 2, label %dec.split
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; CHECK-NEXT: ]
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; CHECK: inc.split: ; preds = %loop_begin
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; CHECK-NEXT: br i1 true, label %us-unreachable.us-lcssa, label %inc
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; CHECK: dec.split: ; preds = %loop_begin
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; CHECK-NEXT: br i1 true, label %us-unreachable6, label %dec
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define i32 @test(i32* %var) {
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%mem = alloca i32
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store i32 2, i32* %mem
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%c = load i32, i32* %mem
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br label %loop_begin
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loop_begin:
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%var_val = load i32, i32* %var
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switch i32 %c, label %default [
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i32 1, label %inc
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i32 2, label %dec
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]
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inc:
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call void @incf() noreturn nounwind
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br label %loop_begin
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dec:
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call void @decf() noreturn nounwind
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br label %loop_begin
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default:
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br label %loop_exit
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loop_exit:
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ret i32 0
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}
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declare void @incf() noreturn
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declare void @decf() noreturn
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; CHECK: attributes #0 = { noreturn }
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; CHECK: attributes [[NOR_NUW]] = { noreturn nounwind }
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