29441e4f5f
This PR removes the old `nocapture` attribute, replacing it with the new `captures` attribute introduced in #116990. This change is intended to be essentially NFC, replacing existing uses of `nocapture` with `captures(none)` without adding any new analysis capabilities. Making use of non-`none` values is left for a followup. Some notes: * `nocapture` will be upgraded to `captures(none)` by the bitcode reader. * `nocapture` will also be upgraded by the textual IR reader. This is to make it easier to use old IR files and somewhat reduce the test churn in this PR. * Helper APIs like `doesNotCapture()` will check for `captures(none)`. * MLIR import will convert `captures(none)` into an `llvm.nocapture` attribute. The representation in the LLVM IR dialect should be updated separately.
44 lines
2.2 KiB
LLVM
44 lines
2.2 KiB
LLVM
; NOTE: Assertions have been autogenerated by utils/update_test_checks.py UTC_ARGS: --version 3
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; RUN: opt -mtriple=riscv64 -cache-line-size=64 -prefetch-distance=64 \
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; RUN: -passes=loop-data-prefetch -S < %s | FileCheck %s
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define void @foo(ptr nocapture %a, ptr nocapture readonly %b) {
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; CHECK-LABEL: define void @foo(
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; CHECK-SAME: ptr captures(none) [[A:%.*]], ptr readonly captures(none) [[B:%.*]]) {
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; CHECK-NEXT: entry:
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; CHECK-NEXT: br label [[FOR_BODY:%.*]]
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; CHECK: for.body:
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; CHECK-NEXT: [[INDVARS_IV:%.*]] = phi i64 [ 0, [[ENTRY:%.*]] ], [ [[INDVARS_IV_NEXT:%.*]], [[FOR_BODY]] ]
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; CHECK-NEXT: [[TMP0:%.*]] = shl nuw nsw i64 [[INDVARS_IV]], 3
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; CHECK-NEXT: [[TMP1:%.*]] = add i64 [[TMP0]], 64
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; CHECK-NEXT: [[SCEVGEP:%.*]] = getelementptr i8, ptr [[B]], i64 [[TMP1]]
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; CHECK-NEXT: [[ARRAYIDX:%.*]] = getelementptr inbounds double, ptr [[B]], i64 [[INDVARS_IV]]
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; CHECK-NEXT: call void @llvm.prefetch.p0(ptr [[SCEVGEP]], i32 0, i32 3, i32 1)
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; CHECK-NEXT: [[TMP2:%.*]] = load double, ptr [[ARRAYIDX]], align 8
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; CHECK-NEXT: [[ADD:%.*]] = fadd double [[TMP2]], 1.000000e+00
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; CHECK-NEXT: [[ARRAYIDX2:%.*]] = getelementptr inbounds double, ptr [[A]], i64 [[INDVARS_IV]]
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; CHECK-NEXT: store double [[ADD]], ptr [[ARRAYIDX2]], align 8
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; CHECK-NEXT: [[INDVARS_IV_NEXT]] = add nuw nsw i64 [[INDVARS_IV]], 1
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; CHECK-NEXT: [[EXITCOND:%.*]] = icmp eq i64 [[INDVARS_IV_NEXT]], 1600
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; CHECK-NEXT: br i1 [[EXITCOND]], label [[FOR_END:%.*]], label [[FOR_BODY]]
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; CHECK: for.end:
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; CHECK-NEXT: ret void
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;
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entry:
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br label %for.body
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for.body: ; preds = %for.body, %entry
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%indvars.iv = phi i64 [ 0, %entry ], [ %indvars.iv.next, %for.body ]
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%arrayidx = getelementptr inbounds double, ptr %b, i64 %indvars.iv
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%0 = load double, ptr %arrayidx, align 8
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%add = fadd double %0, 1.000000e+00
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%arrayidx2 = getelementptr inbounds double, ptr %a, i64 %indvars.iv
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store double %add, ptr %arrayidx2, align 8
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%indvars.iv.next = add nuw nsw i64 %indvars.iv, 1
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%exitcond = icmp eq i64 %indvars.iv.next, 1600
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br i1 %exitcond, label %for.end, label %for.body
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for.end: ; preds = %for.body
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ret void
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}
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