5491666248
The library expansion has too many paths for all the permutations of DAZ, unsafe and the 3 exp functions. It's easier to expand it in the backend when we know all of these things. The library currently misses the no-infinity check on the overflow, which this handles optimizing out. Some of the <3 x half> fast tests regress due to vector widening dropping flags which will be fixed separately. Apparently there is no exp10 intrinsic, but there should be. Adds some deadish code in preparation for adding one while I'm following along with the current library expansion.
225 lines
10 KiB
C++
225 lines
10 KiB
C++
//===- AMDGPULegalizerInfo ---------------------------------------*- C++ -*-==//
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//
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// Part of the LLVM Project, under the Apache License v2.0 with LLVM Exceptions.
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// See https://llvm.org/LICENSE.txt for license information.
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// SPDX-License-Identifier: Apache-2.0 WITH LLVM-exception
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//
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//===----------------------------------------------------------------------===//
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/// \file
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/// This file declares the targeting of the Machinelegalizer class for
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/// AMDGPU.
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/// \todo This should be generated by TableGen.
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//===----------------------------------------------------------------------===//
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#ifndef LLVM_LIB_TARGET_AMDGPU_AMDGPUMACHINELEGALIZER_H
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#define LLVM_LIB_TARGET_AMDGPU_AMDGPUMACHINELEGALIZER_H
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#include "llvm/CodeGen/GlobalISel/LegalizerInfo.h"
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#include "AMDGPUArgumentUsageInfo.h"
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#include "SIInstrInfo.h"
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namespace llvm {
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class GCNTargetMachine;
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class GCNSubtarget;
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class MachineIRBuilder;
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namespace AMDGPU {
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struct ImageDimIntrinsicInfo;
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}
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/// This class provides the information for the target register banks.
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class AMDGPULegalizerInfo final : public LegalizerInfo {
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const GCNSubtarget &ST;
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public:
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AMDGPULegalizerInfo(const GCNSubtarget &ST,
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const GCNTargetMachine &TM);
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bool legalizeCustom(LegalizerHelper &Helper, MachineInstr &MI) const override;
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Register getSegmentAperture(unsigned AddrSpace,
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MachineRegisterInfo &MRI,
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MachineIRBuilder &B) const;
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bool legalizeAddrSpaceCast(MachineInstr &MI, MachineRegisterInfo &MRI,
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MachineIRBuilder &B) const;
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bool legalizeFrint(MachineInstr &MI, MachineRegisterInfo &MRI,
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MachineIRBuilder &B) const;
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bool legalizeFceil(MachineInstr &MI, MachineRegisterInfo &MRI,
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MachineIRBuilder &B) const;
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bool legalizeFrem(MachineInstr &MI, MachineRegisterInfo &MRI,
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MachineIRBuilder &B) const;
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bool legalizeIntrinsicTrunc(MachineInstr &MI, MachineRegisterInfo &MRI,
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MachineIRBuilder &B) const;
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bool legalizeITOFP(MachineInstr &MI, MachineRegisterInfo &MRI,
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MachineIRBuilder &B, bool Signed) const;
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bool legalizeFPTOI(MachineInstr &MI, MachineRegisterInfo &MRI,
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MachineIRBuilder &B, bool Signed) const;
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bool legalizeMinNumMaxNum(LegalizerHelper &Helper, MachineInstr &MI) const;
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bool legalizeExtractVectorElt(MachineInstr &MI, MachineRegisterInfo &MRI,
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MachineIRBuilder &B) const;
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bool legalizeInsertVectorElt(MachineInstr &MI, MachineRegisterInfo &MRI,
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MachineIRBuilder &B) const;
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bool legalizeSinCos(MachineInstr &MI, MachineRegisterInfo &MRI,
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MachineIRBuilder &B) const;
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bool buildPCRelGlobalAddress(Register DstReg, LLT PtrTy, MachineIRBuilder &B,
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const GlobalValue *GV, int64_t Offset,
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unsigned GAFlags = SIInstrInfo::MO_NONE) const;
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bool legalizeGlobalValue(MachineInstr &MI, MachineRegisterInfo &MRI,
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MachineIRBuilder &B) const;
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bool legalizeLoad(LegalizerHelper &Helper, MachineInstr &MI) const;
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bool legalizeStore(LegalizerHelper &Helper, MachineInstr &MI) const;
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bool legalizeFMad(MachineInstr &MI, MachineRegisterInfo &MRI,
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MachineIRBuilder &B) const;
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bool legalizeAtomicCmpXChg(MachineInstr &MI, MachineRegisterInfo &MRI,
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MachineIRBuilder &B) const;
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std::pair<Register, Register>
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getScaledLogInput(MachineIRBuilder &B, Register Src, unsigned Flags) const;
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bool legalizeFlog2(MachineInstr &MI, MachineIRBuilder &B) const;
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bool legalizeFlogCommon(MachineInstr &MI, MachineIRBuilder &B) const;
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bool legalizeFlogUnsafe(MachineIRBuilder &B, Register Dst, Register Src,
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double Log2BaseInverted, unsigned Flags) const;
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bool legalizeFExp2(MachineInstr &MI, MachineIRBuilder &B) const;
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bool legalizeFExpUnsafe(MachineIRBuilder &B, Register Dst, Register Src,
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unsigned Flags) const;
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bool legalizeFExp(MachineInstr &MI, MachineIRBuilder &B) const;
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bool legalizeFPow(MachineInstr &MI, MachineIRBuilder &B) const;
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bool legalizeFFloor(MachineInstr &MI, MachineRegisterInfo &MRI,
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MachineIRBuilder &B) const;
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bool legalizeBuildVector(MachineInstr &MI, MachineRegisterInfo &MRI,
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MachineIRBuilder &B) const;
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void buildMultiply(LegalizerHelper &Helper, MutableArrayRef<Register> Accum,
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ArrayRef<Register> Src0, ArrayRef<Register> Src1,
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bool UsePartialMad64_32,
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bool SeparateOddAlignedProducts) const;
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bool legalizeMul(LegalizerHelper &Helper, MachineInstr &MI) const;
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bool legalizeCTLZ_CTTZ(MachineInstr &MI, MachineRegisterInfo &MRI,
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MachineIRBuilder &B) const;
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bool loadInputValue(Register DstReg, MachineIRBuilder &B,
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const ArgDescriptor *Arg,
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const TargetRegisterClass *ArgRC, LLT ArgTy) const;
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bool loadInputValue(Register DstReg, MachineIRBuilder &B,
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AMDGPUFunctionArgInfo::PreloadedValue ArgType) const;
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bool legalizePointerAsRsrcIntrin(MachineInstr &MI, MachineRegisterInfo &MRI,
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MachineIRBuilder &B) const;
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bool legalizePreloadedArgIntrin(
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MachineInstr &MI, MachineRegisterInfo &MRI, MachineIRBuilder &B,
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AMDGPUFunctionArgInfo::PreloadedValue ArgType) const;
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bool legalizeWorkitemIDIntrinsic(
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MachineInstr &MI, MachineRegisterInfo &MRI, MachineIRBuilder &B,
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unsigned Dim, AMDGPUFunctionArgInfo::PreloadedValue ArgType) const;
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Register getKernargParameterPtr(MachineIRBuilder &B, int64_t Offset) const;
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bool legalizeKernargMemParameter(MachineInstr &MI, MachineIRBuilder &B,
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uint64_t Offset,
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Align Alignment = Align(4)) const;
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bool legalizeUnsignedDIV_REM(MachineInstr &MI, MachineRegisterInfo &MRI,
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MachineIRBuilder &B) const;
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void legalizeUnsignedDIV_REM32Impl(MachineIRBuilder &B, Register DstDivReg,
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Register DstRemReg, Register Num,
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Register Den) const;
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void legalizeUnsignedDIV_REM64Impl(MachineIRBuilder &B, Register DstDivReg,
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Register DstRemReg, Register Num,
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Register Den) const;
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bool legalizeSignedDIV_REM(MachineInstr &MI, MachineRegisterInfo &MRI,
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MachineIRBuilder &B) const;
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bool legalizeFDIV(MachineInstr &MI, MachineRegisterInfo &MRI,
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MachineIRBuilder &B) const;
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bool legalizeFDIV16(MachineInstr &MI, MachineRegisterInfo &MRI,
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MachineIRBuilder &B) const;
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bool legalizeFDIV32(MachineInstr &MI, MachineRegisterInfo &MRI,
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MachineIRBuilder &B) const;
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bool legalizeFDIV64(MachineInstr &MI, MachineRegisterInfo &MRI,
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MachineIRBuilder &B) const;
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bool legalizeFFREXP(MachineInstr &MI, MachineRegisterInfo &MRI,
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MachineIRBuilder &B) const;
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bool legalizeFastUnsafeFDIV(MachineInstr &MI, MachineRegisterInfo &MRI,
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MachineIRBuilder &B) const;
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bool legalizeFastUnsafeFDIV64(MachineInstr &MI, MachineRegisterInfo &MRI,
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MachineIRBuilder &B) const;
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bool legalizeFDIVFastIntrin(MachineInstr &MI, MachineRegisterInfo &MRI,
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MachineIRBuilder &B) const;
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bool legalizeRsqClampIntrinsic(MachineInstr &MI, MachineRegisterInfo &MRI,
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MachineIRBuilder &B) const;
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bool legalizeDSAtomicFPIntrinsic(LegalizerHelper &Helper,
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MachineInstr &MI, Intrinsic::ID IID) const;
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bool getImplicitArgPtr(Register DstReg, MachineRegisterInfo &MRI,
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MachineIRBuilder &B) const;
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bool legalizeImplicitArgPtr(MachineInstr &MI, MachineRegisterInfo &MRI,
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MachineIRBuilder &B) const;
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bool getLDSKernelId(Register DstReg, MachineRegisterInfo &MRI,
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MachineIRBuilder &B) const;
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bool legalizeLDSKernelId(MachineInstr &MI, MachineRegisterInfo &MRI,
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MachineIRBuilder &B) const;
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bool legalizeIsAddrSpace(MachineInstr &MI, MachineRegisterInfo &MRI,
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MachineIRBuilder &B, unsigned AddrSpace) const;
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std::pair<Register, unsigned> splitBufferOffsets(MachineIRBuilder &B,
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Register OrigOffset) const;
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Register handleD16VData(MachineIRBuilder &B, MachineRegisterInfo &MRI,
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Register Reg, bool ImageStore = false) const;
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Register fixStoreSourceType(MachineIRBuilder &B, Register VData,
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bool IsFormat) const;
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bool legalizeBufferStore(MachineInstr &MI, MachineRegisterInfo &MRI,
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MachineIRBuilder &B, bool IsTyped,
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bool IsFormat) const;
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bool legalizeBufferLoad(MachineInstr &MI, MachineRegisterInfo &MRI,
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MachineIRBuilder &B, bool IsFormat,
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bool IsTyped) const;
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bool legalizeBufferAtomic(MachineInstr &MI, MachineIRBuilder &B,
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Intrinsic::ID IID) const;
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bool legalizeBVHIntrinsic(MachineInstr &MI, MachineIRBuilder &B) const;
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bool legalizeFPTruncRound(MachineInstr &MI, MachineIRBuilder &B) const;
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bool legalizeImageIntrinsic(
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MachineInstr &MI, MachineIRBuilder &B,
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GISelChangeObserver &Observer,
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const AMDGPU::ImageDimIntrinsicInfo *ImageDimIntr) const;
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bool legalizeSBufferLoad(LegalizerHelper &Helper, MachineInstr &MI) const;
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bool legalizeTrapIntrinsic(MachineInstr &MI, MachineRegisterInfo &MRI,
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MachineIRBuilder &B) const;
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bool legalizeTrapEndpgm(MachineInstr &MI, MachineRegisterInfo &MRI,
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MachineIRBuilder &B) const;
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bool legalizeTrapHsaQueuePtr(MachineInstr &MI, MachineRegisterInfo &MRI,
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MachineIRBuilder &B) const;
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bool legalizeTrapHsa(MachineInstr &MI, MachineRegisterInfo &MRI,
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MachineIRBuilder &B) const;
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bool legalizeDebugTrapIntrinsic(MachineInstr &MI, MachineRegisterInfo &MRI,
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MachineIRBuilder &B) const;
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bool legalizeIntrinsic(LegalizerHelper &Helper,
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MachineInstr &MI) const override;
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};
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} // End llvm namespace.
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#endif
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