6e54fccede
The instruction-precise, or asynchronous, unwind tables usually take up much more space than the synchronous ones. If a user is concerned about the load size of the program and does not need the features provided with the asynchronous tables, the compiler should be able to generate the more compact variant. This patch changes the generation of CFI instructions for these cases so that they all come in one chunk in the prolog; it emits only one `.cfi_def_cfa*` instruction followed by `.cfi_offset` ones after all stack adjustments and register spills, and avoids generating CFI instructions in the epilog(s) as well as any other exceeding CFI instructions like `.cfi_remember_state` and `.cfi_restore_state`. Effectively, it reverses the effects of D111411 and D114545 on functions with the `uwtable(sync)` attribute. As a side effect, it also restores the behavior on functions that have neither `uwtable` nor `nounwind` attributes. Differential Revision: https://reviews.llvm.org/D153098
83 lines
2.7 KiB
LLVM
83 lines
2.7 KiB
LLVM
; NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py
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; RUN: llc -mtriple=aarch64-none-linux-gnu -mattr=+neon,+fullfp16 < %s -o -| FileCheck %s
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declare half @llvm.fabs.f16(half)
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declare float @llvm.fabs.f32(float)
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declare double @llvm.fabs.f64(double)
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declare fp128 @llvm.fabs.f128(fp128)
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; Check if INFINITY for _Float16 is materialized
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define i32 @replace_isinf_call_f16(half %x) {
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; CHECK-LABEL: replace_isinf_call_f16:
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; CHECK: // %bb.0:
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; CHECK-NEXT: mov w8, #31744
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; CHECK-NEXT: fabs h0, h0
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; CHECK-NEXT: fmov h1, w8
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; CHECK-NEXT: fcmp h0, h1
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; CHECK-NEXT: cset w0, eq
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; CHECK-NEXT: ret
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%abs = tail call half @llvm.fabs.f16(half %x)
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%cmpinf = fcmp oeq half %abs, 0xH7C00
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%ret = zext i1 %cmpinf to i32
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ret i32 %ret
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}
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; Check if INFINITY for float is materialized
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define i32 @replace_isinf_call_f32(float %x) {
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; CHECK-LABEL: replace_isinf_call_f32:
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; CHECK: // %bb.0:
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; CHECK-NEXT: mov w8, #2139095040
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; CHECK-NEXT: fabs s0, s0
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; CHECK-NEXT: fmov s1, w8
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; CHECK-NEXT: fcmp s0, s1
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; CHECK-NEXT: cset w0, eq
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; CHECK-NEXT: ret
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%abs = tail call float @llvm.fabs.f32(float %x)
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%cmpinf = fcmp oeq float %abs, 0x7FF0000000000000
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%ret = zext i1 %cmpinf to i32
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ret i32 %ret
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}
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; Check if INFINITY for double is materialized
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define i32 @replace_isinf_call_f64(double %x) {
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; CHECK-LABEL: replace_isinf_call_f64:
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; CHECK: // %bb.0:
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; CHECK-NEXT: mov x8, #9218868437227405312
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; CHECK-NEXT: fabs d0, d0
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; CHECK-NEXT: fmov d1, x8
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; CHECK-NEXT: fcmp d0, d1
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; CHECK-NEXT: cset w0, eq
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; CHECK-NEXT: ret
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%abs = tail call double @llvm.fabs.f64(double %x)
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%cmpinf = fcmp oeq double %abs, 0x7FF0000000000000
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%ret = zext i1 %cmpinf to i32
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ret i32 %ret
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}
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; For long double it still requires loading the constant.
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define i32 @replace_isinf_call_f128(fp128 %x) {
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; CHECK-LABEL: replace_isinf_call_f128:
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; CHECK: // %bb.0:
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; CHECK-NEXT: sub sp, sp, #32
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; CHECK-NEXT: str x30, [sp, #16] // 8-byte Folded Spill
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; CHECK-NEXT: .cfi_def_cfa_offset 32
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; CHECK-NEXT: .cfi_offset w30, -16
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; CHECK-NEXT: str q0, [sp]
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; CHECK-NEXT: ldrb w8, [sp, #15]
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; CHECK-NEXT: and w8, w8, #0x7f
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; CHECK-NEXT: strb w8, [sp, #15]
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; CHECK-NEXT: adrp x8, .LCPI3_0
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; CHECK-NEXT: ldr q0, [sp]
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; CHECK-NEXT: ldr q1, [x8, :lo12:.LCPI3_0]
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; CHECK-NEXT: bl __eqtf2
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; CHECK-NEXT: ldr x30, [sp, #16] // 8-byte Folded Reload
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; CHECK-NEXT: cmp w0, #0
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; CHECK-NEXT: cset w0, eq
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; CHECK-NEXT: add sp, sp, #32
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; CHECK-NEXT: ret
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%abs = tail call fp128 @llvm.fabs.f128(fp128 %x)
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%cmpinf = fcmp oeq fp128 %abs, 0xL00000000000000007FFF000000000000
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%ret = zext i1 %cmpinf to i32
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ret i32 %ret
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}
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