7a98f084c4
Currently, the custom SGPR spill lowering pass spills SGPRs into physical VGPR lanes and the remaining VGPRs are used by regalloc for vector regclass allocation. This imposes many restrictions that we ended up with unsuccessful SGPR spilling when there won't be enough VGPRs and we are forced to spill the leftover into memory during PEI. The custom spill handling during PEI has many edge cases and often breaks the compiler time to time. This patch implements spilling SGPRs into virtual VGPR lanes. Since we now split the register allocation for SGPRs and VGPRs, the virtual registers introduced for the spill lanes would get allocated automatically in the subsequent regalloc invocation for VGPRs. Spill to virtual registers will always be successful, even in the high-pressure situations, and hence it avoids most of the edge cases during PEI. We are now left with only the custom SGPR spills during PEI for special registers like the frame pointer which is an unproblematic case. Differential Revision: https://reviews.llvm.org/D124196
232 lines
8.6 KiB
LLVM
232 lines
8.6 KiB
LLVM
; RUN: llc -mtriple=amdgcn--amdpal -mattr=-xnack -verify-machineinstrs < %s | FileCheck -check-prefixes=GCN,SDAG,GFX8 -enable-var-scope %s
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; RUN: llc -mtriple=amdgcn--amdpal -mcpu=gfx900 -mattr=-xnack -verify-machineinstrs < %s | FileCheck -check-prefixes=GCN,SDAG,GFX9 -enable-var-scope %s
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; RUN: llc -global-isel -mtriple=amdgcn--amdpal -mattr=-xnack -mcpu=gfx900 -verify-machineinstrs < %s | FileCheck -check-prefixes=GCN,GISEL,GFX9 -enable-var-scope %s
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declare amdgpu_gfx float @extern_func(float) #0
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declare amdgpu_gfx float @extern_func_many_args(<64 x float>) #0
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@funcptr = external hidden unnamed_addr addrspace(4) constant ptr, align 4
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define amdgpu_gfx float @no_stack(float %arg0) #0 {
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%add = fadd float %arg0, 1.0
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ret float %add
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}
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define amdgpu_gfx float @simple_stack(float %arg0) #0 {
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%stack = alloca float, i32 4, align 4, addrspace(5)
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store volatile float 2.0, ptr addrspace(5) %stack
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%val = load volatile float, ptr addrspace(5) %stack
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%add = fadd float %arg0, %val
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ret float %add
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}
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define amdgpu_gfx float @multiple_stack(float %arg0) #0 {
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%stack = alloca float, i32 4, align 4, addrspace(5)
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store volatile float 2.0, ptr addrspace(5) %stack
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%val = load volatile float, ptr addrspace(5) %stack
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%add = fadd float %arg0, %val
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%stack2 = alloca float, i32 4, align 4, addrspace(5)
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store volatile float 2.0, ptr addrspace(5) %stack2
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%val2 = load volatile float, ptr addrspace(5) %stack2
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%add2 = fadd float %add, %val2
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ret float %add2
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}
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define amdgpu_gfx float @dynamic_stack(float %arg0) #0 {
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bb0:
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%cmp = fcmp ogt float %arg0, 0.0
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br i1 %cmp, label %bb1, label %bb2
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bb1:
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%stack = alloca float, i32 4, align 4, addrspace(5)
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store volatile float 2.0, ptr addrspace(5) %stack
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%val = load volatile float, ptr addrspace(5) %stack
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%add = fadd float %arg0, %val
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br label %bb2
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bb2:
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%res = phi float [ 0.0, %bb0 ], [ %add, %bb1 ]
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ret float %res
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}
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define amdgpu_gfx float @dynamic_stack_loop(float %arg0) #0 {
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bb0:
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br label %bb1
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bb1:
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%ctr = phi i32 [ 0, %bb0 ], [ %newctr, %bb1 ]
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%stack = alloca float, i32 4, align 4, addrspace(5)
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store volatile float 2.0, ptr addrspace(5) %stack
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%val = load volatile float, ptr addrspace(5) %stack
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%add = fadd float %arg0, %val
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%cmp = icmp sgt i32 %ctr, 0
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%newctr = sub i32 %ctr, 1
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br i1 %cmp, label %bb1, label %bb2
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bb2:
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ret float %add
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}
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define amdgpu_gfx float @no_stack_call(float %arg0) #0 {
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%res = call amdgpu_gfx float @simple_stack(float %arg0)
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ret float %res
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}
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define amdgpu_gfx float @simple_stack_call(float %arg0) #0 {
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%stack = alloca float, i32 4, align 4, addrspace(5)
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store volatile float 2.0, ptr addrspace(5) %stack
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%val = load volatile float, ptr addrspace(5) %stack
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%res = call amdgpu_gfx float @simple_stack(float %arg0)
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%add = fadd float %res, %val
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ret float %add
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}
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define amdgpu_gfx float @no_stack_extern_call(float %arg0) #0 {
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%res = call amdgpu_gfx float @extern_func(float %arg0)
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ret float %res
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}
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define amdgpu_gfx float @simple_stack_extern_call(float %arg0) #0 {
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%stack = alloca float, i32 4, align 4, addrspace(5)
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store volatile float 2.0, ptr addrspace(5) %stack
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%val = load volatile float, ptr addrspace(5) %stack
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%res = call amdgpu_gfx float @extern_func(float %arg0)
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%add = fadd float %res, %val
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ret float %add
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}
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define amdgpu_gfx float @no_stack_extern_call_many_args(<64 x float> %arg0) #0 {
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%res = call amdgpu_gfx float @extern_func_many_args(<64 x float> %arg0)
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ret float %res
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}
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define amdgpu_gfx float @no_stack_indirect_call(float %arg0) #0 {
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%fptr = load ptr, ptr addrspace(4) @funcptr
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call amdgpu_gfx void %fptr()
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ret float %arg0
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}
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define amdgpu_gfx float @simple_stack_indirect_call(float %arg0) #0 {
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%stack = alloca float, i32 4, align 4, addrspace(5)
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store volatile float 2.0, ptr addrspace(5) %stack
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%val = load volatile float, ptr addrspace(5) %stack
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%fptr = load ptr, ptr addrspace(4) @funcptr
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call amdgpu_gfx void %fptr()
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%add = fadd float %arg0, %val
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ret float %add
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}
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define amdgpu_gfx float @simple_stack_recurse(float %arg0) #0 {
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%stack = alloca float, i32 4, align 4, addrspace(5)
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store volatile float 2.0, ptr addrspace(5) %stack
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%val = load volatile float, ptr addrspace(5) %stack
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%res = call amdgpu_gfx float @simple_stack_recurse(float %arg0)
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%add = fadd float %res, %val
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ret float %add
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}
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@lds = internal addrspace(3) global [64 x float] undef
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define amdgpu_gfx float @simple_lds(float %arg0) #0 {
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%val = load float, ptr addrspace(3) @lds
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ret float %val
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}
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define amdgpu_gfx float @simple_lds_recurse(float %arg0) #0 {
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%val = load float, ptr addrspace(3) @lds
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%res = call amdgpu_gfx float @simple_lds_recurse(float %val)
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ret float %res
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}
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attributes #0 = { nounwind }
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; GCN: amdpal.pipelines:
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; GCN-NEXT: - .registers:
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; GCN-NEXT: 0x2e12 (COMPUTE_PGM_RSRC1): 0xaf01ca{{$}}
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; GCN-NEXT: 0x2e13 (COMPUTE_PGM_RSRC2): 0x8001{{$}}
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; GCN-NEXT: .shader_functions:
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; GCN-NEXT: dynamic_stack:
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; GCN-NEXT: .lds_size: 0{{$}}
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; GCN-NEXT: .sgpr_count: 0x28{{$}}
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; GCN-NEXT: .stack_frame_size_in_bytes: 0x10{{$}}
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; SDAG-NEXT: .vgpr_count: 0x2{{$}}
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; GISEL-NEXT: .vgpr_count: 0x3{{$}}
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; GCN-NEXT: dynamic_stack_loop:
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; GCN-NEXT: .lds_size: 0{{$}}
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; SDAG-NEXT: .sgpr_count: 0x25{{$}}
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; GISEL-NEXT: .sgpr_count: 0x26{{$}}
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; GCN-NEXT: .stack_frame_size_in_bytes: 0x10{{$}}
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; SDAG-NEXT: .vgpr_count: 0x3{{$}}
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; GISEL-NEXT: .vgpr_count: 0x4{{$}}
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; GCN-NEXT: multiple_stack:
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; GCN-NEXT: .lds_size: 0{{$}}
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; GCN-NEXT: .sgpr_count: 0x21{{$}}
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; GCN-NEXT: .stack_frame_size_in_bytes: 0x24{{$}}
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; GCN-NEXT: .vgpr_count: 0x3{{$}}
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; GCN-NEXT: no_stack:
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; GCN-NEXT: .lds_size: 0{{$}}
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; GCN-NEXT: .sgpr_count: 0x20{{$}}
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; GCN-NEXT: .stack_frame_size_in_bytes: 0{{$}}
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; GCN-NEXT: .vgpr_count: 0x1{{$}}
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; GCN-NEXT: no_stack_call:
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; GCN-NEXT: .lds_size: 0{{$}}
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; GCN-NEXT: .sgpr_count: 0x25{{$}}
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; GCN-NEXT: .stack_frame_size_in_bytes: 0x10{{$}}
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; GCN-NEXT: .vgpr_count: 0x3{{$}}
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; GCN-NEXT: no_stack_extern_call:
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; GCN-NEXT: .lds_size: 0{{$}}
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; GFX8-NEXT: .sgpr_count: 0x28{{$}}
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; GFX9-NEXT: .sgpr_count: 0x2c{{$}}
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; GCN-NEXT: .stack_frame_size_in_bytes: 0x10{{$}}
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; GCN-NEXT: .vgpr_count: 0x2b{{$}}
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; GCN-NEXT: no_stack_extern_call_many_args:
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; GCN-NEXT: .lds_size: 0{{$}}
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; GFX8-NEXT: .sgpr_count: 0x28{{$}}
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; GFX9-NEXT: .sgpr_count: 0x2c{{$}}
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; GCN-NEXT: .stack_frame_size_in_bytes: 0x90{{$}}
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; GCN-NEXT: .vgpr_count: 0x2b{{$}}
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; GCN-NEXT: no_stack_indirect_call:
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; GCN-NEXT: .lds_size: 0{{$}}
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; GFX8-NEXT: .sgpr_count: 0x28{{$}}
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; GFX9-NEXT: .sgpr_count: 0x2c{{$}}
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; GCN-NEXT: .stack_frame_size_in_bytes: 0x10{{$}}
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; GCN-NEXT: .vgpr_count: 0x2b{{$}}
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; GCN-NEXT: simple_lds:
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; GCN-NEXT: .lds_size: 0x100{{$}}
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; GCN-NEXT: .sgpr_count: 0x20{{$}}
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; GCN-NEXT: .stack_frame_size_in_bytes: 0{{$}}
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; GCN-NEXT: .vgpr_count: 0x1{{$}}
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; GCN-NEXT: simple_lds_recurse:
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; GCN-NEXT: .lds_size: 0x100{{$}}
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; GCN-NEXT: .sgpr_count: 0x28{{$}}
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; GCN-NEXT: .stack_frame_size_in_bytes: 0x10{{$}}
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; GCN-NEXT: .vgpr_count: 0x29{{$}}
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; GCN-NEXT: simple_stack:
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; GCN-NEXT: .lds_size: 0{{$}}
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; GCN-NEXT: .sgpr_count: 0x21{{$}}
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; GCN-NEXT: .stack_frame_size_in_bytes: 0x14{{$}}
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; GCN-NEXT: .vgpr_count: 0x2{{$}}
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; GCN-NEXT: simple_stack_call:
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; GCN-NEXT: .lds_size: 0{{$}}
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; GCN-NEXT: .sgpr_count: 0x25{{$}}
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; GCN-NEXT: .stack_frame_size_in_bytes: 0x20{{$}}
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; GCN-NEXT: .vgpr_count: 0x4{{$}}
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; GCN-NEXT: simple_stack_extern_call:
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; GCN-NEXT: .lds_size: 0{{$}}
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; GFX8-NEXT: .sgpr_count: 0x28{{$}}
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; GFX9-NEXT: .sgpr_count: 0x2c{{$}}
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; GCN-NEXT: .stack_frame_size_in_bytes: 0x20{{$}}
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; GCN-NEXT: .vgpr_count: 0x2b{{$}}
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; GCN-NEXT: simple_stack_indirect_call:
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; GCN-NEXT: .lds_size: 0{{$}}
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; GFX8-NEXT: .sgpr_count: 0x28{{$}}
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; GFX9-NEXT: .sgpr_count: 0x2c{{$}}
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; GCN-NEXT: .stack_frame_size_in_bytes: 0x20{{$}}
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; GCN-NEXT: .vgpr_count: 0x2b{{$}}
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; GCN-NEXT: simple_stack_recurse:
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; GCN-NEXT: .lds_size: 0{{$}}
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; GCN-NEXT: .sgpr_count: 0x28{{$}}
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; GCN-NEXT: .stack_frame_size_in_bytes: 0x20{{$}}
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; GCN-NEXT: .vgpr_count: 0x2a{{$}}
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; GCN-NEXT: ...
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