54cf69c9d5
Summary: This patch introduces a mechanism to check the code object version from the module flag, This avoids checking from command line. In case the module flag is missing, we use the current default code object version supported in the compiler. For tools whose inputs are not IR, we may need other approach (directive, for example) to check the code object version, That will be in a separate patch later. For LIT tests update, we directly add module flag if there is only a single code object version associated with all checks in one file. In cause of multiple code object version in one file, we use the "sed" method to "clone" the checks to achieve the goal. Reviewer: arsenm Differential Revision: https://reviews.llvm.org/D14313
74 lines
3.9 KiB
LLVM
74 lines
3.9 KiB
LLVM
; RUN: llc -march=amdgcn -mcpu=bonaire -show-mc-encoding < %s | FileCheck --check-prefixes=GCN,CI,ALL %s
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; RUN: llc -march=amdgcn -mcpu=carrizo --show-mc-encoding < %s | FileCheck --check-prefixes=GCN,VI,ALL %s
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; RUN: llc -march=amdgcn -mcpu=gfx900 --show-mc-encoding < %s | FileCheck --check-prefixes=GCN,GFX9,ALL %s
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; RUN: llc -march=amdgcn -mcpu=bonaire -mtriple=amdgcn-unknown-amdhsa -mattr=-flat-for-global < %s | FileCheck --check-prefixes=GCNHSA,ALL %s
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; RUN: llc -march=amdgcn -mcpu=carrizo -mtriple=amdgcn-unknown-amdhsa -mattr=-flat-for-global < %s | FileCheck --check-prefixes=GCNHSA,ALL %s
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; RUN: llc -march=amdgcn -mcpu=gfx1010 -mtriple=amdgcn-unknown-amdhsa -mattr=-flat-for-global < %s | FileCheck --check-prefixes=GCNHSA,ALL %s
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; RUN: llc -march=amdgcn -mcpu=gfx1100 -mtriple=amdgcn-unknown-amdhsa -mattr=-flat-for-global,-architected-flat-scratch,-user-sgpr-init16-bug < %s | FileCheck --check-prefixes=GCNHSA,ALL %s
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; FIXME: align on alloca seems to be ignored for private_segment_alignment
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; ALL-LABEL: {{^}}large_alloca_compute_shader:
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; GCN-DAG: s_mov_b32 s{{[0-9]+}}, SCRATCH_RSRC_DWORD0
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; GCN-DAG: ; fixup A - offset: 4, value: SCRATCH_RSRC_DWORD0
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; GCN-DAG: s_mov_b32 s{{[0-9]+}}, SCRATCH_RSRC_DWORD1
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; GCN-DAG: ; fixup A - offset: 4, value: SCRATCH_RSRC_DWORD1
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; GCN-DAG: s_mov_b32 s{{[0-9]+}}, -1
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; CI-DAG: s_mov_b32 s{{[0-9]+}}, 0xe8f000
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; VI-DAG: s_mov_b32 s{{[0-9]+}}, 0xe80000
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; GFX9-DAG: s_mov_b32 s{{[0-9]+}}, 0xe00000
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; GCNHSA: buffer_store_{{dword|b32}} {{v[0-9]+}}, {{v[0-9]+}}, s[0:3], 0 offen
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; GCNHSA: buffer_load_{{dword|b32}} {{v[0-9]+}}, {{v[0-9]+}}, s[0:3], 0 offen
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; GCNHSA: .amdhsa_kernel large_alloca_compute_shader
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; GCNHSA: .amdhsa_group_segment_fixed_size 0
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; GCNHSA: .amdhsa_private_segment_fixed_size 32772
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; GCNHSA: .amdhsa_user_sgpr_private_segment_buffer 1
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; GCNHSA: .amdhsa_user_sgpr_dispatch_ptr 0
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; GCNHSA: .amdhsa_user_sgpr_queue_ptr 0
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; GCNHSA: .amdhsa_user_sgpr_kernarg_segment_ptr 1
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; GCNHSA: .amdhsa_user_sgpr_dispatch_id 0
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; GCNHSA: .amdhsa_user_sgpr_flat_scratch_init 1
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; GCNHSA: .amdhsa_user_sgpr_private_segment_size 0
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; GCNHSA: .amdhsa_system_sgpr_private_segment_wavefront_offset 1
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; GCNHSA: .amdhsa_system_sgpr_workgroup_id_x 1
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; GCNHSA: .amdhsa_system_sgpr_workgroup_id_y 0
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; GCNHSA: .amdhsa_system_sgpr_workgroup_id_z 0
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; GCNHSA: .amdhsa_system_sgpr_workgroup_info 0
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; GCNHSA: .amdhsa_system_vgpr_workitem_id 0
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; GCNHSA: .amdhsa_next_free_vgpr 3
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; GCNHSA: .amdhsa_next_free_sgpr 10
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; GCNHSA: .amdhsa_float_round_mode_32 0
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; GCNHSA: .amdhsa_float_round_mode_16_64 0
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; GCNHSA: .amdhsa_float_denorm_mode_32 3
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; GCNHSA: .amdhsa_float_denorm_mode_16_64 3
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; GCNHSA: .amdhsa_dx10_clamp 1
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; GCNHSA: .amdhsa_ieee_mode 1
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; GCNHSA: .amdhsa_exception_fp_ieee_invalid_op 0
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; GCNHSA: .amdhsa_exception_fp_denorm_src 0
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; GCNHSA: .amdhsa_exception_fp_ieee_div_zero 0
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; GCNHSA: .amdhsa_exception_fp_ieee_overflow 0
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; GCNHSA: .amdhsa_exception_fp_ieee_underflow 0
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; GCNHSA: .amdhsa_exception_fp_ieee_inexact 0
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; GCNHSA: .amdhsa_exception_int_div_zero 0
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; GCNHSA: .end_amdhsa_kernel
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; Scratch size = alloca size + emergency stack slot, align {{.*}}, addrspace(5)
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; ALL: ; ScratchSize: 32772
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define amdgpu_kernel void @large_alloca_compute_shader(i32 %x, i32 %y) #0 {
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%large = alloca [8192 x i32], align 4, addrspace(5)
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%gep = getelementptr [8192 x i32], ptr addrspace(5) %large, i32 0, i32 8191
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store volatile i32 %x, ptr addrspace(5) %gep
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%gep1 = getelementptr [8192 x i32], ptr addrspace(5) %large, i32 0, i32 %y
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%val = load volatile i32, ptr addrspace(5) %gep1
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store volatile i32 %val, ptr addrspace(1) undef
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ret void
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}
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attributes #0 = { nounwind }
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!llvm.module.flags = !{!0}
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!0 = !{i32 1, !"amdgpu_code_object_version", i32 400}
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