262c2c0fd2
vectorize-buffer-fat-pointer.ll required a manual check line fix. vector-alloca-addrspacecast.ll required a manual fixup of a check line. partial-regcopy-and-spill-missed-at-regalloc.ll required re-running update_mir_test_checks. The HSA metadata tests required avoiding the script touching the type name in the metadata. annotate-noclobber.ll ran into one update script bug. It deleted a check line with a 0 offset GEP, moving the following -NEXT check logically up one line.
51 lines
2.1 KiB
LLVM
51 lines
2.1 KiB
LLVM
; RUN: llc -march=amdgcn -mcpu=gfx906 -verify-machineinstrs < %s | FileCheck -check-prefix=GCN %s
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; GCN-LABEL: {{^}}trunc_store_v4i64_v4i8:
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; GCN: global_store_dword v{{[0-9]+}}, v{{[0-9]+}}, s{{\[[0-9]+:[0-9]+\]}}
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define amdgpu_kernel void @trunc_store_v4i64_v4i8(ptr addrspace(1) %out, <4 x i64> %in) {
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entry:
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%trunc = trunc <4 x i64> %in to < 4 x i8>
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store <4 x i8> %trunc, ptr addrspace(1) %out
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ret void
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}
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; GCN-LABEL: {{^}}trunc_store_v8i64_v8i8:
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; GCN: global_store_dwordx2 v{{[0-9]+}}, v{{\[[0-9]:[0-9]+\]}}, s{{\[[0-9]+:[0-9]+\]}}
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define amdgpu_kernel void @trunc_store_v8i64_v8i8(ptr addrspace(1) %out, <8 x i64> %in) {
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entry:
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%trunc = trunc <8 x i64> %in to < 8 x i8>
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store <8 x i8> %trunc, ptr addrspace(1) %out
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ret void
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}
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; GCN-LABEL: {{^}}trunc_store_v8i64_v8i16:
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; GCN: global_store_dwordx4 v{{[0-9]+}}, v{{\[[0-9]:[0-9]+\]}}, s{{\[[0-9]+:[0-9]+\]}}
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define amdgpu_kernel void @trunc_store_v8i64_v8i16(ptr addrspace(1) %out, <8 x i64> %in) {
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entry:
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%trunc = trunc <8 x i64> %in to < 8 x i16>
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store <8 x i16> %trunc, ptr addrspace(1) %out
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ret void
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}
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; GCN-LABEL: {{^}}trunc_store_v8i64_v8i32:
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; GCN: global_store_dwordx4 v{{[0-9]+}}, v{{\[[0-9]+:[0-9]+\]}}, s{{\[[0-9]+:[0-9]+\]}} offset:16
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; GCN: global_store_dwordx4 v{{[0-9]+}}, v{{\[[0-9]+:[0-9]+\]}}, s{{\[[0-9]+:[0-9]+\]$}}
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define amdgpu_kernel void @trunc_store_v8i64_v8i32(ptr addrspace(1) %out, <8 x i64> %in) {
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entry:
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%trunc = trunc <8 x i64> %in to <8 x i32>
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store <8 x i32> %trunc, ptr addrspace(1) %out
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ret void
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}
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; GCN-LABEL: {{^}}trunc_store_v16i64_v16i32:
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; GCN: global_store_dwordx4 v{{[0-9]+}}, v{{\[[0-9]+:[0-9]+\]}}, s{{\[[0-9]+:[0-9]+\]}} offset:48
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; GCN: global_store_dwordx4 v{{[0-9]+}}, v{{\[[0-9]+:[0-9]+\]}}, s{{\[[0-9]+:[0-9]+\]}} offset:32
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; GCN: global_store_dwordx4 v{{[0-9]+}}, v{{\[[0-9]+:[0-9]+\]}}, s{{\[[0-9]+:[0-9]+\]}} offset:16
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; GCN: global_store_dwordx4 v{{[0-9]+}}, v{{\[[0-9]+:[0-9]+\]}}, s{{\[[0-9]+:[0-9]+\]$}}
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define amdgpu_kernel void @trunc_store_v16i64_v16i32(ptr addrspace(1) %out, <16 x i64> %in) {
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entry:
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%trunc = trunc <16 x i64> %in to <16 x i32>
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store <16 x i32> %trunc, ptr addrspace(1) %out
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ret void
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}
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