02ba5b8c6b
No longer conservatively assume a load/store accesses the stack when we can prove that we did not compute any stack-relative address up to this point in the program. We do this in a cheap not-quite-a-dataflow-analysis: Assume `NoStackAddressUsed` when all predecessors of a block already guarantee it. Process blocks in reverse post order to guarantee that except for loop headers we have processed all predecessors of a block before processing the block itself. For loops we accept the conservative answer as they are unlikely to be shrink-wrappable anyway. Differential Revision: https://reviews.llvm.org/D152213
209 lines
6.8 KiB
LLVM
209 lines
6.8 KiB
LLVM
; NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py UTC_ARGS: --version 2
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; RUN: llc -verify-machineinstrs -mcpu=pwr7 -mattr=-altivec -mtriple powerpc-ibm-aix-xcoff \
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; RUN: -code-model=small -stop-after=machine-cp < %s | FileCheck \
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; RUN: --check-prefix=32SMALL-MIR %s
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; RUN: llc -verify-machineinstrs -mcpu=pwr7 -mattr=-altivec -mtriple powerpc-ibm-aix-xcoff \
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; RUN: -code-model=large -stop-after=machine-cp < %s | FileCheck \
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; RUN: --check-prefix=32LARGE-MIR %s
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; RUN: llc -verify-machineinstrs -mcpu=pwr7 -mattr=-altivec -mtriple powerpc64-ibm-aix-xcoff \
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; RUN: -code-model=small -stop-after=machine-cp < %s | FileCheck \
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; RUN: --check-prefix=64SMALL-MIR %s
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; RUN: llc -verify-machineinstrs -mcpu=pwr7 -mattr=-altivec -mtriple powerpc64-ibm-aix-xcoff \
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; RUN: -code-model=large -stop-after=machine-cp < %s | FileCheck \
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; RUN: --check-prefix=64LARGE-MIR %s
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; RUN: llc -mtriple powerpc-ibm-aix-xcoff -code-model=small < %s | FileCheck \
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; RUN: --check-prefixes=32SMALL-ASM,SMALL-ASM %s
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; RUN: llc -mtriple powerpc-ibm-aix-xcoff -code-model=large < %s | FileCheck \
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; RUN: --check-prefixes=32LARGE-ASM,LARGE-ASM %s
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; RUN: llc -mtriple powerpc64-ibm-aix-xcoff -code-model=small < %s | FileCheck \
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; RUN: --check-prefixes=64SMALL-ASM,SMALL-ASM %s
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; RUN: llc -mtriple powerpc64-ibm-aix-xcoff -code-model=large < %s | FileCheck \
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; RUN: --check-prefixes=64LARGE-ASM,LARGE-ASM %s
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; RUN: llc -mtriple powerpc-ibm-aix-xcoff -function-sections < %s | FileCheck \
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; RUN: --check-prefix=FUNC-ASM %s
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; RUN: llc -mtriple powerpc64-ibm-aix-xcoff -function-sections < %s | FileCheck \
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; RUN: --check-prefix=FUNC-ASM %s
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define i32 @jump_table(i32 %a) {
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; 32SMALL-ASM-LABEL: jump_table:
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; 32SMALL-ASM: # %bb.0: # %entry
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; 32SMALL-ASM-NEXT: addi 3, 3, -1
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; 32SMALL-ASM-NEXT: cmplwi 3, 3
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; 32SMALL-ASM-NEXT: bgt 0, L..BB0_3
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; 32SMALL-ASM-NEXT: # %bb.1: # %entry
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; 32SMALL-ASM-NEXT: lwz 4, L..C0(2) # %jump-table.0
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; 32SMALL-ASM-NEXT: slwi 3, 3, 2
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; 32SMALL-ASM-NEXT: lwzx 3, 3, 4
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; 32SMALL-ASM-NEXT: add 3, 3, 4
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; 32SMALL-ASM-NEXT: mtctr 3
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; 32SMALL-ASM-NEXT: bctr
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; 32SMALL-ASM-NEXT: L..BB0_2: # %sw.bb
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; 32SMALL-ASM-NEXT: #APP
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; 32SMALL-ASM-NEXT: #NO_APP
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; 32SMALL-ASM-NEXT: L..BB0_3: # %sw.epilog
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; 32SMALL-ASM-NEXT: li 3, 0
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; 32SMALL-ASM-NEXT: blr
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; 32SMALL-ASM-NEXT: L..BB0_4: # %sw.bb1
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; 32SMALL-ASM-NEXT: li 3, 0
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; 32SMALL-ASM-NEXT: #APP
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; 32SMALL-ASM-NEXT: #NO_APP
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; 32SMALL-ASM-NEXT: blr
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; 32SMALL-ASM-NEXT: L..BB0_5: # %sw.bb2
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; 32SMALL-ASM-NEXT: li 3, 0
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; 32SMALL-ASM-NEXT: #APP
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; 32SMALL-ASM-NEXT: #NO_APP
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; 32SMALL-ASM-NEXT: blr
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; 32SMALL-ASM-NEXT: L..BB0_6: # %sw.bb3
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; 32SMALL-ASM-NEXT: li 3, 0
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; 32SMALL-ASM-NEXT: #APP
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; 32SMALL-ASM-NEXT: #NO_APP
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; 32SMALL-ASM-NEXT: blr
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;
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; 32LARGE-ASM-LABEL: jump_table:
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; 32LARGE-ASM: # %bb.0: # %entry
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; 32LARGE-ASM-NEXT: addi 3, 3, -1
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; 32LARGE-ASM-NEXT: cmplwi 3, 3
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; 32LARGE-ASM-NEXT: bgt 0, L..BB0_3
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; 32LARGE-ASM-NEXT: # %bb.1: # %entry
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; 32LARGE-ASM-NEXT: addis 4, L..C0@u(2)
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; 32LARGE-ASM-NEXT: slwi 3, 3, 2
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; 32LARGE-ASM-NEXT: lwz 4, L..C0@l(4)
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; 32LARGE-ASM-NEXT: lwzx 3, 3, 4
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; 32LARGE-ASM-NEXT: add 3, 3, 4
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; 32LARGE-ASM-NEXT: mtctr 3
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; 32LARGE-ASM-NEXT: bctr
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; 32LARGE-ASM-NEXT: L..BB0_2: # %sw.bb
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; 32LARGE-ASM-NEXT: #APP
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; 32LARGE-ASM-NEXT: #NO_APP
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; 32LARGE-ASM-NEXT: L..BB0_3: # %sw.epilog
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; 32LARGE-ASM-NEXT: li 3, 0
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; 32LARGE-ASM-NEXT: blr
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; 32LARGE-ASM-NEXT: L..BB0_4: # %sw.bb1
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; 32LARGE-ASM-NEXT: li 3, 0
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; 32LARGE-ASM-NEXT: #APP
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; 32LARGE-ASM-NEXT: #NO_APP
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; 32LARGE-ASM-NEXT: blr
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; 32LARGE-ASM-NEXT: L..BB0_5: # %sw.bb2
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; 32LARGE-ASM-NEXT: li 3, 0
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; 32LARGE-ASM-NEXT: #APP
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; 32LARGE-ASM-NEXT: #NO_APP
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; 32LARGE-ASM-NEXT: blr
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; 32LARGE-ASM-NEXT: L..BB0_6: # %sw.bb3
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; 32LARGE-ASM-NEXT: li 3, 0
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; 32LARGE-ASM-NEXT: #APP
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; 32LARGE-ASM-NEXT: #NO_APP
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; 32LARGE-ASM-NEXT: blr
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;
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; 64SMALL-ASM-LABEL: jump_table:
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; 64SMALL-ASM: # %bb.0: # %entry
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; 64SMALL-ASM-NEXT: addi 3, 3, -1
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; 64SMALL-ASM-NEXT: cmplwi 3, 3
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; 64SMALL-ASM-NEXT: bgt 0, L..BB0_3
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; 64SMALL-ASM-NEXT: # %bb.1: # %entry
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; 64SMALL-ASM-NEXT: ld 4, L..C0(2) # %jump-table.0
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; 64SMALL-ASM-NEXT: rldic 3, 3, 2, 30
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; 64SMALL-ASM-NEXT: lwax 3, 3, 4
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; 64SMALL-ASM-NEXT: add 3, 3, 4
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; 64SMALL-ASM-NEXT: mtctr 3
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; 64SMALL-ASM-NEXT: bctr
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; 64SMALL-ASM-NEXT: L..BB0_2: # %sw.bb
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; 64SMALL-ASM-NEXT: #APP
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; 64SMALL-ASM-NEXT: #NO_APP
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; 64SMALL-ASM-NEXT: L..BB0_3: # %sw.epilog
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; 64SMALL-ASM-NEXT: li 3, 0
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; 64SMALL-ASM-NEXT: blr
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; 64SMALL-ASM-NEXT: L..BB0_4: # %sw.bb1
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; 64SMALL-ASM-NEXT: li 3, 0
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; 64SMALL-ASM-NEXT: #APP
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; 64SMALL-ASM-NEXT: #NO_APP
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; 64SMALL-ASM-NEXT: blr
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; 64SMALL-ASM-NEXT: L..BB0_5: # %sw.bb2
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; 64SMALL-ASM-NEXT: li 3, 0
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; 64SMALL-ASM-NEXT: #APP
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; 64SMALL-ASM-NEXT: #NO_APP
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; 64SMALL-ASM-NEXT: blr
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; 64SMALL-ASM-NEXT: L..BB0_6: # %sw.bb3
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; 64SMALL-ASM-NEXT: li 3, 0
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; 64SMALL-ASM-NEXT: #APP
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; 64SMALL-ASM-NEXT: #NO_APP
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; 64SMALL-ASM-NEXT: blr
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;
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; 64LARGE-ASM-LABEL: jump_table:
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; 64LARGE-ASM: # %bb.0: # %entry
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; 64LARGE-ASM-NEXT: addi 3, 3, -1
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; 64LARGE-ASM-NEXT: cmplwi 3, 3
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; 64LARGE-ASM-NEXT: bgt 0, L..BB0_3
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; 64LARGE-ASM-NEXT: # %bb.1: # %entry
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; 64LARGE-ASM-NEXT: addis 4, L..C0@u(2)
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; 64LARGE-ASM-NEXT: rldic 3, 3, 2, 30
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; 64LARGE-ASM-NEXT: ld 4, L..C0@l(4)
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; 64LARGE-ASM-NEXT: lwax 3, 3, 4
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; 64LARGE-ASM-NEXT: add 3, 3, 4
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; 64LARGE-ASM-NEXT: mtctr 3
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; 64LARGE-ASM-NEXT: bctr
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; 64LARGE-ASM-NEXT: L..BB0_2: # %sw.bb
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; 64LARGE-ASM-NEXT: #APP
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; 64LARGE-ASM-NEXT: #NO_APP
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; 64LARGE-ASM-NEXT: L..BB0_3: # %sw.epilog
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; 64LARGE-ASM-NEXT: li 3, 0
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; 64LARGE-ASM-NEXT: blr
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; 64LARGE-ASM-NEXT: L..BB0_4: # %sw.bb1
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; 64LARGE-ASM-NEXT: li 3, 0
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; 64LARGE-ASM-NEXT: #APP
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; 64LARGE-ASM-NEXT: #NO_APP
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; 64LARGE-ASM-NEXT: blr
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; 64LARGE-ASM-NEXT: L..BB0_5: # %sw.bb2
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; 64LARGE-ASM-NEXT: li 3, 0
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; 64LARGE-ASM-NEXT: #APP
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; 64LARGE-ASM-NEXT: #NO_APP
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; 64LARGE-ASM-NEXT: blr
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; 64LARGE-ASM-NEXT: L..BB0_6: # %sw.bb3
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; 64LARGE-ASM-NEXT: li 3, 0
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; 64LARGE-ASM-NEXT: #APP
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; 64LARGE-ASM-NEXT: #NO_APP
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; 64LARGE-ASM-NEXT: blr
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entry:
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switch i32 %a, label %sw.epilog [
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i32 1, label %sw.bb
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i32 2, label %sw.bb1
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i32 3, label %sw.bb2
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i32 4, label %sw.bb3
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]
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sw.bb:
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tail call void asm sideeffect "", ""()
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br label %sw.epilog
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sw.bb1:
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tail call void asm sideeffect "", ""()
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br label %sw.epilog
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sw.bb2:
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tail call void asm sideeffect "", ""()
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br label %sw.epilog
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sw.bb3:
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tail call void asm sideeffect "", ""()
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br label %sw.epilog
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sw.epilog:
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ret i32 0
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}
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;; NOTE: These prefixes are unused and the list is autogenerated. Do not add tests below this line:
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; 32LARGE-MIR: {{.*}}
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; 32SMALL-MIR: {{.*}}
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; 64LARGE-MIR: {{.*}}
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; 64SMALL-MIR: {{.*}}
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; FUNC-ASM: {{.*}}
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; LARGE-ASM: {{.*}}
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; SMALL-ASM: {{.*}}
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