a2b5117df7
Count of input operands affect pipeline forwarding in scheduling model. Previous Power10 model definition arranges some instructions into incorrect groups, by counting the wrong number of input operands. This patch updates the model, setting the input operands count correctly by excluding irrelevant immediate operands and count memory operands of load instructions correctly. Reviewed By: shchenz Differential Revision: https://reviews.llvm.org/D153842
74 lines
2.5 KiB
LLVM
74 lines
2.5 KiB
LLVM
; RUN: llc -verify-machineinstrs -mtriple=powerpc64le-unknown-linux-gnu \
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; RUN: -mcpu=pwr10 -ppc-asm-full-reg-names < %s | FileCheck %s \
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; RUN: --check-prefix=CHECK-R
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; RUN: llc -verify-machineinstrs -mtriple=powerpc64le-unknown-linux-gnu \
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; RUN: -mcpu=pwr10 -ppc-use-absolute-jumptables \
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; RUN: -ppc-asm-full-reg-names < %s | FileCheck %s \
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; RUN: --check-prefix=CHECK-A-LE
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; RUN: llc -verify-machineinstrs -target-abi=elfv2 -mtriple=powerpc64-- \
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; RUN: -mcpu=pwr10 -ppc-asm-full-reg-names < %s | FileCheck %s \
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; RUN: --check-prefix=CHECK-R
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; RUN: llc -verify-machineinstrs -target-abi=elfv2 -mtriple=powerpc64-- \
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; RUN: -mcpu=pwr10 -ppc-use-absolute-jumptables \
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; RUN: -ppc-asm-full-reg-names < %s | FileCheck %s \
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; RUN: --check-prefix=CHECK-A-BE
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; This test checks for getting relative and absolute jump table base address
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; using PC Relative addressing.
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define dso_local signext i32 @jumptable(i32 signext %param) {
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; CHECK-R-LABEL: jumptable:
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; CHECK-R: # %bb.1: # %entry
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; CHECK-R-NEXT: rldic r4, r4
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; CHECK-R-NEXT: paddi r5, 0, .LJTI0_0@PCREL, 1
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; CHECK-R-NEXT: lwax r4, r4, r5
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; CHECK-R-NEXT: add r4, r4, r5
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; CHECK-R-NEXT: mtctr r4
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; CHECK-R-NEXT: bctr
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; CHECK-A-LE-LABEL: jumptable:
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; CHECK-A-LE: # %bb.1: # %entry
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; CHECK-A-LE-NEXT: rldic r4, r4
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; CHECK-A-LE-NEXT: paddi r5, 0, .LJTI0_0@PCREL, 1
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; CHECK-A-LE-NEXT: ldx r4, r4, r5
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; CHECK-A-LE-NEXT: mtctr r4
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; CHECK-A-LE-NEXT: bctr
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; CHECK-A-BE-LABEL: jumptable:
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; CHECK-A-BE: # %bb.1: # %entry
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; CHECK-A-BE-NEXT: rldic r4, r4
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; CHECK-A-BE-NEXT: paddi r5, 0, .LJTI0_0@PCREL, 1
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; CHECK-A-BE-NEXT: lwax r4, r4, r5
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; CHECK-A-BE-NEXT: mtctr r4
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; CHECK-A-BE-NEXT: bctr
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entry:
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switch i32 %param, label %sw.default [
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i32 1, label %return
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i32 2, label %sw.bb1
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i32 3, label %sw.bb2
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i32 4, label %sw.bb3
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i32 20, label %sw.bb4
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]
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sw.bb1: ; preds = %entry
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br label %return
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sw.bb2: ; preds = %entry
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br label %return
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sw.bb3: ; preds = %entry
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br label %return
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sw.bb4: ; preds = %entry
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br label %return
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sw.default: ; preds = %entry
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br label %return
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return: ; preds = %entry, %sw.default, %sw.bb4, %sw.bb3, %sw.bb2, %sw.bb1
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%retval.0 = phi i32 [ -1, %sw.default ], [ 400, %sw.bb4 ], [ 16, %sw.bb3 ],
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[ 9, %sw.bb2 ], [ 4, %sw.bb1 ], [ %param, %entry ]
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ret i32 %retval.0
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}
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