fe558efe71
This patch was split from D122918 . Co-Author: @liaolucy @realqhc Reviewed By: craig.topper Differential Revision: https://reviews.llvm.org/D148874
62 lines
2.1 KiB
LLVM
62 lines
2.1 KiB
LLVM
; NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py
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; RUN: llc -mtriple=riscv32 -mattr=+f -verify-machineinstrs < %s \
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; RUN: | FileCheck -check-prefix=RV32IF %s
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; RUN: llc -mtriple=riscv64 -mattr=+f -verify-machineinstrs < %s \
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; RUN: | FileCheck -check-prefix=RV64IF %s
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; RUN: llc -mtriple=riscv32 -mattr=+zfinx -verify-machineinstrs < %s \
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; RUN: | FileCheck -check-prefix=RV32IZFINX %s
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; RUN: llc -mtriple=riscv64 -mattr=+zfinx -verify-machineinstrs < %s \
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; RUN: | FileCheck -check-prefix=RV64IZFINX %s
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; RUN: llc -mtriple=riscv32 -verify-machineinstrs < %s \
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; RUN: | FileCheck -check-prefix=RV32I %s
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; RUN: llc -mtriple=riscv64 -verify-machineinstrs < %s \
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; RUN: | FileCheck -check-prefix=RV64I %s
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define float @frem_f32(float %a, float %b) nounwind {
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; RV32IF-LABEL: frem_f32:
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; RV32IF: # %bb.0:
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; RV32IF-NEXT: tail fmodf@plt
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;
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; RV64IF-LABEL: frem_f32:
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; RV64IF: # %bb.0:
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; RV64IF-NEXT: addi sp, sp, -16
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; RV64IF-NEXT: sd ra, 8(sp) # 8-byte Folded Spill
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; RV64IF-NEXT: call fmodf@plt
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; RV64IF-NEXT: ld ra, 8(sp) # 8-byte Folded Reload
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; RV64IF-NEXT: addi sp, sp, 16
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; RV64IF-NEXT: ret
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;
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; RV32IZFINX-LABEL: frem_f32:
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; RV32IZFINX: # %bb.0:
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; RV32IZFINX-NEXT: tail fmodf@plt
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;
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; RV64IZFINX-LABEL: frem_f32:
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; RV64IZFINX: # %bb.0:
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; RV64IZFINX-NEXT: addi sp, sp, -16
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; RV64IZFINX-NEXT: sd ra, 8(sp) # 8-byte Folded Spill
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; RV64IZFINX-NEXT: call fmodf@plt
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; RV64IZFINX-NEXT: ld ra, 8(sp) # 8-byte Folded Reload
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; RV64IZFINX-NEXT: addi sp, sp, 16
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; RV64IZFINX-NEXT: ret
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;
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; RV32I-LABEL: frem_f32:
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; RV32I: # %bb.0:
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; RV32I-NEXT: addi sp, sp, -16
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; RV32I-NEXT: sw ra, 12(sp) # 4-byte Folded Spill
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; RV32I-NEXT: call fmodf@plt
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; RV32I-NEXT: lw ra, 12(sp) # 4-byte Folded Reload
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; RV32I-NEXT: addi sp, sp, 16
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; RV32I-NEXT: ret
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;
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; RV64I-LABEL: frem_f32:
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; RV64I: # %bb.0:
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; RV64I-NEXT: addi sp, sp, -16
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; RV64I-NEXT: sd ra, 8(sp) # 8-byte Folded Spill
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; RV64I-NEXT: call fmodf@plt
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; RV64I-NEXT: ld ra, 8(sp) # 8-byte Folded Reload
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; RV64I-NEXT: addi sp, sp, 16
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; RV64I-NEXT: ret
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%1 = frem float %a, %b
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ret float %1
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}
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