ee5585ed09
Improve and enable folding of conditional branches with tail calls. 1. Make it so that conditional tail calls can be emitted even when there are multiple predecessors. 2. Don't guard the transformation behind -Os. The rationale for guarding it was static-prediction can be affected by whether the branch is forward of backward. This is no longer true for almost any X86 cpus (anything newer than `SnB`) so is no longer a meaningful concern. Reviewed By: pengfei Differential Revision: https://reviews.llvm.org/D140931
266 lines
7.3 KiB
LLVM
266 lines
7.3 KiB
LLVM
; NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py
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; RUN: llc -mtriple=x86_64-- < %s -jump-table-density=40 -switch-peel-threshold=101 | FileCheck %s
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; This switch should use bit tests, and the third bit test case is just
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; testing for one possible value, so it doesn't need a bt.
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define void @test(ptr %l) nounwind {
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; CHECK-LABEL: test:
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; CHECK: # %bb.0: # %entry
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; CHECK-NEXT: pushq %rax
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; CHECK-NEXT: movq %rdi, (%rsp)
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; CHECK-NEXT: movsbl (%rdi), %eax
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; CHECK-NEXT: addl $-33, %eax
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; CHECK-NEXT: cmpl $61, %eax
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; CHECK-NEXT: ja .LBB0_7
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; CHECK-NEXT: # %bb.1: # %entry
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; CHECK-NEXT: movabsq $2305843009482129440, %rcx # imm = 0x2000000010000020
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; CHECK-NEXT: btq %rax, %rcx
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; CHECK-NEXT: jb .LBB0_6
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; CHECK-NEXT: # %bb.2: # %entry
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; CHECK-NEXT: movl $671088640, %ecx # imm = 0x28000000
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; CHECK-NEXT: btq %rax, %rcx
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; CHECK-NEXT: jae .LBB0_3
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; CHECK-NEXT: # %bb.5: # %sw.bb
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; CHECK-NEXT: xorl %edi, %edi
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; CHECK-NEXT: jmp .LBB0_8
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; CHECK-NEXT: .LBB0_6: # %sw.bb2
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; CHECK-NEXT: movl $1, %edi
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; CHECK-NEXT: jmp .LBB0_8
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; CHECK-NEXT: .LBB0_3: # %entry
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; CHECK-NEXT: testq %rax, %rax
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; CHECK-NEXT: jne .LBB0_7
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; CHECK-NEXT: # %bb.4: # %sw.bb4
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; CHECK-NEXT: movl $3, %edi
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; CHECK-NEXT: jmp .LBB0_8
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; CHECK-NEXT: .LBB0_7: # %sw.default
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; CHECK-NEXT: movl $97, %edi
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; CHECK-NEXT: .LBB0_8: # %sw.epilog
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; CHECK-NEXT: callq foo@PLT
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; CHECK-NEXT: popq %rax
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; CHECK-NEXT: retq
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entry:
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%l.addr = alloca ptr, align 8 ; <ptr> [#uses=2]
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store ptr %l, ptr %l.addr
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%tmp = load ptr, ptr %l.addr ; <ptr> [#uses=1]
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%tmp1 = load i8, ptr %tmp ; <i8> [#uses=1]
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%conv = sext i8 %tmp1 to i32 ; <i32> [#uses=1]
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switch i32 %conv, label %sw.default [
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i32 62, label %sw.bb
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i32 60, label %sw.bb
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i32 38, label %sw.bb2
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i32 94, label %sw.bb2
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i32 61, label %sw.bb2
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i32 33, label %sw.bb4
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]
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sw.bb: ; preds = %entry, %entry
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call void @foo(i32 0)
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br label %sw.epilog
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sw.bb2: ; preds = %entry, %entry, %entry
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call void @foo(i32 1)
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br label %sw.epilog
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sw.bb4: ; preds = %entry
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call void @foo(i32 3)
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br label %sw.epilog
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sw.default: ; preds = %entry
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call void @foo(i32 97)
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br label %sw.epilog
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sw.epilog: ; preds = %sw.default, %sw.bb4, %sw.bb2, %sw.bb
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ret void
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}
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declare void @foo(i32)
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; Don't zero extend the test operands to pointer type if it can be avoided.
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; rdar://8781238
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define void @test2(i32 %x) nounwind ssp {
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; CHECK-LABEL: test2:
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; CHECK: # %bb.0: # %entry
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; CHECK-NEXT: cmpl $6, %edi
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; CHECK-NEXT: ja .LBB1_2
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; CHECK-NEXT: # %bb.1: # %entry
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; CHECK-NEXT: movl $91, %eax
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; CHECK-NEXT: btl %edi, %eax
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; CHECK-NEXT: jb bar@PLT # TAILCALL
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; CHECK-NEXT: .LBB1_2: # %if.end
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; CHECK-NEXT: retq
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entry:
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switch i32 %x, label %if.end [
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i32 6, label %if.then
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i32 4, label %if.then
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i32 3, label %if.then
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i32 1, label %if.then
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i32 0, label %if.then
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]
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if.then: ; preds = %entry, %entry, %entry, %entry, %entry
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tail call void @bar() nounwind
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ret void
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if.end: ; preds = %entry
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ret void
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}
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declare void @bar()
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define void @test3(i32 %x) nounwind {
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; CHECK-LABEL: test3:
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; CHECK: # %bb.0:
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; CHECK-NEXT: cmpl $5, %edi
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; CHECK-NEXT: ja .LBB2_2
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; CHECK-NEXT: # %bb.1:
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; CHECK-NEXT: cmpl $4, %edi
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; CHECK-NEXT: jne bar@PLT # TAILCALL
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; CHECK-NEXT: .LBB2_2: # %if.end
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; CHECK-NEXT: retq
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switch i32 %x, label %if.end [
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i32 0, label %if.then
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i32 1, label %if.then
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i32 2, label %if.then
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i32 3, label %if.then
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i32 5, label %if.then
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]
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if.then:
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tail call void @bar() nounwind
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ret void
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if.end:
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ret void
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}
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; Ensure that optimizing for jump tables doesn't needlessly deteriorate the
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; created binary tree search. See PR22262.
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define void @test4(i32 %x, ptr %y) {
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; CHECK-LABEL: test4:
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; CHECK: # %bb.0: # %entry
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; CHECK-NEXT: cmpl $39, %edi
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; CHECK-NEXT: jg .LBB3_5
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; CHECK-NEXT: # %bb.1: # %entry
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; CHECK-NEXT: cmpl $10, %edi
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; CHECK-NEXT: je .LBB3_9
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; CHECK-NEXT: # %bb.2: # %entry
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; CHECK-NEXT: cmpl $20, %edi
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; CHECK-NEXT: je .LBB3_10
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; CHECK-NEXT: # %bb.3: # %entry
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; CHECK-NEXT: cmpl $30, %edi
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; CHECK-NEXT: jne .LBB3_13
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; CHECK-NEXT: # %bb.4: # %sw.bb2
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; CHECK-NEXT: movl $3, (%rsi)
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; CHECK-NEXT: retq
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; CHECK-NEXT: .LBB3_5: # %entry
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; CHECK-NEXT: cmpl $40, %edi
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; CHECK-NEXT: je .LBB3_11
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; CHECK-NEXT: # %bb.6: # %entry
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; CHECK-NEXT: cmpl $50, %edi
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; CHECK-NEXT: je .LBB3_12
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; CHECK-NEXT: # %bb.7: # %entry
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; CHECK-NEXT: cmpl $60, %edi
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; CHECK-NEXT: jne .LBB3_13
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; CHECK-NEXT: # %bb.8: # %sw.bb5
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; CHECK-NEXT: movl $6, (%rsi)
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; CHECK-NEXT: retq
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; CHECK-NEXT: .LBB3_9: # %sw.bb
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; CHECK-NEXT: movl $1, (%rsi)
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; CHECK-NEXT: retq
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; CHECK-NEXT: .LBB3_10: # %sw.bb1
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; CHECK-NEXT: movl $2, (%rsi)
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; CHECK-NEXT: retq
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; CHECK-NEXT: .LBB3_11: # %sw.bb3
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; CHECK-NEXT: movl $4, (%rsi)
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; CHECK-NEXT: retq
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; CHECK-NEXT: .LBB3_12: # %sw.bb4
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; CHECK-NEXT: movl $5, (%rsi)
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; CHECK-NEXT: retq
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; CHECK-NEXT: .LBB3_13: # %sw.default
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; CHECK-NEXT: movl $7, (%rsi)
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; CHECK-NEXT: retq
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entry:
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switch i32 %x, label %sw.default [
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i32 10, label %sw.bb
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i32 20, label %sw.bb1
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i32 30, label %sw.bb2
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i32 40, label %sw.bb3
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i32 50, label %sw.bb4
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i32 60, label %sw.bb5
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]
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sw.bb:
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store i32 1, ptr %y
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br label %sw.epilog
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sw.bb1:
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store i32 2, ptr %y
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br label %sw.epilog
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sw.bb2:
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store i32 3, ptr %y
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br label %sw.epilog
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sw.bb3:
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store i32 4, ptr %y
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br label %sw.epilog
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sw.bb4:
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store i32 5, ptr %y
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br label %sw.epilog
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sw.bb5:
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store i32 6, ptr %y
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br label %sw.epilog
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sw.default:
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store i32 7, ptr %y
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br label %sw.epilog
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sw.epilog:
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ret void
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; The balanced binary switch here would start with a comparison against 39, but
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; it is currently starting with 29 because of the density-sum heuristic.
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}
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; Omit the range check when the default case is unreachable, see PR43129.
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declare void @g(i32)
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define void @test5(i32 %x) {
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; CHECK-LABEL: test5:
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; CHECK: # %bb.0: # %entry
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; CHECK-NEXT: pushq %rax
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; CHECK-NEXT: .cfi_def_cfa_offset 16
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; CHECK-NEXT: movl $73, %eax
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; CHECK-NEXT: btl %edi, %eax
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; CHECK-NEXT: jb .LBB4_3
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; CHECK-NEXT: # %bb.1: # %entry
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; CHECK-NEXT: movl $146, %eax
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; CHECK-NEXT: btl %edi, %eax
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; CHECK-NEXT: jae .LBB4_2
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; CHECK-NEXT: # %bb.4: # %bb1
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; CHECK-NEXT: movl $1, %edi
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; CHECK-NEXT: callq g@PLT
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; CHECK-NEXT: .LBB4_3: # %bb0
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; CHECK-NEXT: xorl %edi, %edi
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; CHECK-NEXT: callq g@PLT
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; CHECK-NEXT: .LBB4_2: # %bb2
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; CHECK-NEXT: movl $2, %edi
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; CHECK-NEXT: callq g@PLT
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entry:
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switch i32 %x, label %return [
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; 73 = 2^0 + 2^3 + 2^6
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i32 0, label %bb0
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i32 3, label %bb0
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i32 6, label %bb0
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; 146 = 2^1 + 2^4 + 2^7
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i32 1, label %bb1
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i32 4, label %bb1
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i32 7, label %bb1
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i32 2, label %bb2
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i32 5, label %bb2
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i32 8, label %bb2
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]
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bb0: tail call void @g(i32 0) br label %return
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bb1: tail call void @g(i32 1) br label %return
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bb2: tail call void @g(i32 2) br label %return
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return: unreachable
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}
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