d8faa61b20
Commit on - This patch fixes the bug described in http://lists.cs.uiuc.edu/pipermail/llvmdev/2013-May/062343.html The fix allocates an extra slot just below the GPRs and stores the base pointer there. This is done only for functions containing llvm.eh.sjlj.setjmp that also need a base pointer. Because code containing llvm.eh.sjlj.setjmp saves all of the callee-save GPRs in the prologue, the offset to the extra slot can be computed before prologue generation runs. Impact at run-time on affected functions is:: - One extra store in the prologue, The store saves the base pointer. - One extra load after a llvm.eh.sjlj.setjmp. The load restores the base pointer. Because the extra slot is just above a gap between frame-pointer-relative and base-pointer-relative chunks of memory, there is no impact on other offset calculations other than ensuring there is room for the extra slot. http://reviews.llvm.org/D6388 Patch by Arch Robison <arch.robison@intel.com> llvm-svn: 223329
34 lines
1.0 KiB
C++
34 lines
1.0 KiB
C++
//===-- X86MachineFuctionInfo.cpp - X86 machine function info -------------===//
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//
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// The LLVM Compiler Infrastructure
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//
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// This file is distributed under the University of Illinois Open Source
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// License. See LICENSE.TXT for details.
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//
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//===----------------------------------------------------------------------===//
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#include "X86MachineFunctionInfo.h"
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#include "X86RegisterInfo.h"
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#include "llvm/Target/TargetSubtargetInfo.h"
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using namespace llvm;
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void X86MachineFunctionInfo::anchor() { }
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void X86MachineFunctionInfo::setRestoreBasePointer(const MachineFunction *MF) {
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if (!RestoreBasePointerOffset) {
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const X86RegisterInfo *RegInfo = static_cast<const X86RegisterInfo *>(
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MF->getSubtarget().getRegisterInfo());
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unsigned SlotSize = RegInfo->getSlotSize();
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for (const MCPhysReg *CSR =
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RegInfo->X86RegisterInfo::getCalleeSavedRegs(MF);
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unsigned Reg = *CSR;
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++CSR)
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{
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if (X86::GR64RegClass.contains(Reg) || X86::GR32RegClass.contains(Reg))
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RestoreBasePointerOffset -= SlotSize;
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}
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}
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}
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