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clang-p2996/llvm/lib/Target/AMDGPU
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Stanislav Mekhanoshin 8715600435 [AMDGPU] Set SchedRW = Write64Bit on V_MOV_B64 (#70135) 
This is mostly NFCI as V_MOV_B64_PSEUDO is selected instead and expanded
past RA.
2023-10-25 10:50:53 -07:00
..
AsmParser
[AMDGPU] Allow lit() on operands which do not accept modifiers (#69527)
2023-10-19 10:41:44 -07:00
Disassembler
AMDGPU: Minor updates to program resource registers (#69525)
2023-10-19 12:40:19 -04:00
MCA
[bazel] Remove the dependency on CodeGen from MCTargetDesc & Utils
2023-08-30 18:21:28 -07:00
MCTargetDesc
[AMDGPU][NFCI] Decouple actual register encodings from HWEncoding values. (#69452)
2023-10-25 13:24:50 +01:00
TargetInfo
[AMDGPU] Eliminate SIMCCodeEmitter and de-virtualise encoding methods.
2023-07-05 10:13:33 +01:00
Utils
[AMDGPU][NFCI] Decouple actual register encodings from HWEncoding values. (#69452)
2023-10-25 13:24:50 +01:00
AMDGPU.h
[AMDGPU] New image intrinsic optimizer pass (#67151)
2023-09-26 09:33:49 +01:00
AMDGPU.td
[AMDGPU] Add encoding/decoding support for non-result-returning ATOMIC_CSUB instructions (#68684)
2023-10-11 11:37:27 +01:00
AMDGPUAliasAnalysis.cpp
[AA] Skip the layer of indirection in returning conservative results.
2023-07-28 12:13:35 -07:00
AMDGPUAliasAnalysis.h
…
AMDGPUAlwaysInlinePass.cpp
[amdgpu] Implement dynamic LDS accesses from non-kernel functions
2023-04-04 20:06:34 +01:00
AMDGPUAnnotateKernelFeatures.cpp
…
AMDGPUAnnotateUniformValues.cpp
[AMDGPU] Replace LegacyDA with Uniformity Analysis in AnnotateUniformValues
2023-02-28 13:05:38 -07:00
AMDGPUArgumentUsageInfo.cpp
[AMDGPU] Add DAG ISel support for preloaded kernel arguments
2023-09-25 09:32:59 -07:00
AMDGPUArgumentUsageInfo.h
[AMDGPU] Add DAG ISel support for preloaded kernel arguments
2023-09-25 09:32:59 -07:00
AMDGPUAsmPrinter.cpp
Revert "[AMDGPU] Remove Code Object V3 (#67118)"
2023-10-18 12:55:36 +02:00
AMDGPUAsmPrinter.h
[AMDGPU] Introduce AMDGPU::SGPR_SPILL asm comment flag (#67091)
2023-09-29 11:15:01 +05:30
AMDGPUAtomicOptimizer.cpp
[AMDGPU] Fix scan of atomicFSub in AtomicOptimizer. (#66082)
2023-09-13 09:57:10 +05:30
AMDGPUAttributes.def
…
AMDGPUAttributor.cpp
[AMDGPU] Use inreg for hint to preload kernel arguments
2023-09-19 15:13:38 -07:00
AMDGPUCallingConv.td
[AMDGPU] ISel for amdgpu_cs_chain[_preserve] functions
2023-08-21 11:16:17 +02:00
AMDGPUCallLowering.cpp
[GISel] Make assignValueToReg take CCValAssign by const reference. (#70086)
2023-10-24 15:47:04 -07:00
AMDGPUCallLowering.h
…
AMDGPUCodeGenPrepare.cpp
AMDGPU: Avoid creating vector extracts if we aren't going to do anything
2023-09-13 09:45:34 +03:00
AMDGPUCombine.td
[GlobalISel] Cleanup Combine.td
2023-09-05 08:19:06 +02:00
AMDGPUCombinerHelper.cpp
AMDGPU/GlobalISel: Don't pointlessly check for convergent intrinsics
2023-09-15 23:32:19 +03:00
AMDGPUCombinerHelper.h
[llvm] Fix include guards
2023-06-13 10:47:18 +01:00
AMDGPUCtorDtorLowering.cpp
[AMDGPU] Add attribute to AMDGPU ctor / dtor to indicate single threadedness
2023-05-24 07:24:17 -05:00
AMDGPUCtorDtorLowering.h
…
AMDGPUExportClustering.cpp
…
AMDGPUExportClustering.h
…
AMDGPUFeatures.td
…
AMDGPUFrameLowering.cpp
…
AMDGPUFrameLowering.h
…
AMDGPUGenRegisterBankInfo.def
…
AMDGPUGISel.td
AMDGPU: Try to select fmul by power of 2 to ldexp
2023-08-11 07:57:55 -04:00
AMDGPUGlobalISelUtils.cpp
Restore CodeGen/LowLevelType from Support
2023-05-03 00:13:19 +09:00
AMDGPUGlobalISelUtils.h
…
AMDGPUHSAMetadataStreamer.cpp
Revert "[AMDGPU] Remove Code Object V3 (#67118)"
2023-10-18 12:55:36 +02:00
AMDGPUHSAMetadataStreamer.h
Revert "[AMDGPU] Remove Code Object V3 (#67118)"
2023-10-18 12:55:36 +02:00
AMDGPUIGroupLP.cpp
[llvm] Use llvm::any_of (NFC)
2023-10-22 10:42:18 -07:00
AMDGPUIGroupLP.h
[AMDGPU][IGLP] SingleWaveOpt: Cache DSW Counters from PreRA (#67759)
2023-10-06 17:34:14 -07:00
AMDGPUImageIntrinsicOptimizer.cpp
[AMDGPU] Fix image intrinsic optimizer on loads from different resources (#69355)
2023-10-18 11:08:01 +01:00
AMDGPUInsertDelayAlu.cpp
[AMDGPU] Add functions for composing and decomposing S_WAIT_DEPCTR operands
2023-07-04 11:02:12 +01:00
AMDGPUInstCombineIntrinsic.cpp
[AMDGPUInstCombine] Avoid use of ConstantExpr::getSExt() (NFC)
2023-10-02 11:12:04 +02:00
AMDGPUInstrInfo.cpp
Restore "[GlobalISel] GIntrinsic subclass to represent intrinsics in Generic Machine IR"
2023-07-27 14:49:17 +05:30
AMDGPUInstrInfo.h
Restore "[GlobalISel] GIntrinsic subclass to represent intrinsics in Generic Machine IR"
2023-07-27 14:49:17 +05:30
AMDGPUInstrInfo.td
AMDGPU: Remove unused node definition
2023-09-07 20:30:14 +03:00
AMDGPUInstructions.td
[AMDGPU][AsmParser] Eliminate custom predicates for named-bit operands. (#69243)
2023-10-17 13:59:42 +01:00
AMDGPUInstructionSelector.cpp
[AMDGPU] Select gfx1150 SALU Float instructions (#66885)
2023-09-21 12:22:55 +02:00
AMDGPUInstructionSelector.h
[AMDGPU] Select gfx1150 SALU Float instructions (#66885)
2023-09-21 12:22:55 +02:00
AMDGPUISelDAGToDAG.cpp
[AMDGPU] Select gfx1150 SALU Float instructions (#66885)
2023-09-21 12:22:55 +02:00
AMDGPUISelDAGToDAG.h
[AMDGPU] Select gfx1150 SALU Float instructions (#66885)
2023-09-21 12:22:55 +02:00
AMDGPUISelLowering.cpp
[AMDGPU] Constant fold FMAD_FTZ (#69443)
2023-10-19 16:05:51 +02:00
AMDGPUISelLowering.h
[GlobalISel] Remove TargetLowering::isConstantUnsignedBitfieldExtractLegal
2023-09-27 15:58:01 +01:00
AMDGPULateCodeGenPrepare.cpp
AMDGPU: Use getTypeStoreSizeInBits
2023-04-29 10:35:06 -04:00
AMDGPULegalizerInfo.cpp
Revert "[AMDGPU] Remove Code Object V3 (#67118)"
2023-10-18 12:55:36 +02:00
AMDGPULegalizerInfo.h
[AMDGPU] Use absolute relocations when compiling for AMDPAL and Mesa3D (#67791)
2023-10-10 09:22:02 +02:00
AMDGPULibCalls.cpp
AMDGPU: Handle rounding intrinsic exponents in isKnownIntegral
2023-09-01 08:22:16 -04:00
AMDGPULibFunc.cpp
AMDGPU: Use pown instead of pow if known integral
2023-09-01 08:22:16 -04:00
AMDGPULibFunc.h
AMDGPU: Use pown instead of pow if known integral
2023-09-01 08:22:16 -04:00
AMDGPULowerKernelArguments.cpp
[AMDGPU] Add IR lowering changes for preloaded kernargs
2023-09-25 08:54:07 -07:00
AMDGPULowerKernelAttributes.cpp
AMDGPU: Use module flag to get code object version at IR level folow-up
2023-02-10 11:16:38 -08:00
AMDGPULowerModuleLDSPass.cpp
[NFC][RemoveDIs] Use iterators over inst-pointers when using IRBuilder
2023-09-11 20:01:19 +01:00
AMDGPUMachineCFGStructurizer.cpp
[AMDGPU] Remove unused variable 'CNI' in /AMDGPUMachineCFGStructurizer.cpp (NFC)
2023-07-25 15:56:40 +08:00
AMDGPUMachineFunction.cpp
[AMDGPU] Add IsChainFunction to the MachineFunctionInfo
2023-08-21 12:37:32 +02:00
AMDGPUMachineFunction.h
[AMDGPU] Add IsChainFunction to the MachineFunctionInfo
2023-08-21 12:37:32 +02:00
AMDGPUMachineModuleInfo.cpp
…
AMDGPUMachineModuleInfo.h
…
AMDGPUMacroFusion.cpp
…
AMDGPUMacroFusion.h
…
AMDGPUMCInstLower.cpp
[AMDGPU] Fix expensive-checks build.
2023-07-05 10:26:21 +01:00
AMDGPUMCInstLower.h
…
AMDGPUMIRFormatter.cpp
…
AMDGPUMIRFormatter.h
…
AMDGPUOpenCLEnqueuedBlockLowering.cpp
[llvm] Remove uses of Type::getPointerTo() (NFC)
2023-09-30 06:55:41 -04:00
AMDGPUPerfHintAnalysis.cpp
…
AMDGPUPerfHintAnalysis.h
…
AMDGPUPostLegalizerCombiner.cpp
[NFC][CodeGen] Change CodeGenOpt::Level/CodeGenFileType into enum classes (#66295)
2023-09-14 14:10:14 -07:00
AMDGPUPreLegalizerCombiner.cpp
[NFC][CodeGen] Change CodeGenOpt::Level/CodeGenFileType into enum classes (#66295)
2023-09-14 14:10:14 -07:00
AMDGPUPrintfRuntimeBinding.cpp
[AMDGPU] Respect nobuiltin when converting printf
2023-08-22 12:48:16 -05:00
AMDGPUPromoteAlloca.cpp
AMDGPU: Pass in TargetMachine to AMDGPULowerModuleLDSPass
2023-09-02 12:02:36 -04:00
AMDGPUPromoteKernelArguments.cpp
[llvm] Remove uses of getWithSamePointeeType() (NFC)
2023-07-18 12:07:09 +02:00
AMDGPUPTNote.h
…
AMDGPURegBankCombiner.cpp
[NFC][CodeGen] Change CodeGenOpt::Level/CodeGenFileType into enum classes (#66295)
2023-09-14 14:10:14 -07:00
AMDGPURegBankSelect.cpp
AMDGPU: Special case uniformity info for single lane workgroups
2023-06-28 07:25:48 -04:00
AMDGPURegBankSelect.h
AMDGPU/GlobalISel: Add stub custom regbankselect pass
2023-01-30 16:18:20 -04:00
AMDGPURegisterBankInfo.cpp
[AMDGPU] Select gfx1150 SALU Float instructions (#66885)
2023-09-21 12:22:55 +02:00
AMDGPURegisterBankInfo.h
GlobalISel: Pass MachineIRBuilder to applyMappingImpl
2023-07-31 10:03:38 -04:00
AMDGPURegisterBanks.td
…
AMDGPURemoveIncompatibleFunctions.cpp
AMDGPU: Add s-memrealtime and s-memtime-inst to RemoveIncompatibleFunctions
2023-08-22 10:22:41 -07:00
AMDGPUResourceUsageAnalysis.cpp
[AMDGPU] Add utilities to track number of user SGPRs. NFC.
2023-09-12 08:52:30 -07:00
AMDGPUResourceUsageAnalysis.h
…
AMDGPURewriteOutArguments.cpp
[llvm] Move AttributeMask to a separate header
2023-06-27 15:26:17 +01:00
AMDGPURewriteUndefForPHI.cpp
[AMDGPU] Port AMDGPURewriteUndefForPHI to new pass manager (#66008)
2023-09-12 13:32:02 -07:00
AMDGPUSearchableTables.td
AMDGPU: Drop and upgrade llvm.amdgcn.atomic.inc/dec to atomicrmw
2023-06-21 21:20:26 -04:00
AMDGPUSetWavePriority.cpp
…
AMDGPUSubtarget.cpp
[AMDGPU] Add DAG ISel support for preloaded kernel arguments
2023-09-25 09:32:59 -07:00
AMDGPUSubtarget.h
[AMDGPU] Have a subtarget feature to control use of real True16 instructions.
2023-09-22 10:47:13 +01:00
AMDGPUTargetMachine.cpp
[HIP][LLVM][Opt] Add LLVM support for hipstdpar
2023-10-12 11:26:48 +01:00
AMDGPUTargetMachine.h
[NFC][CodeGen] Change CodeGenOpt::Level/CodeGenFileType into enum classes (#66295)
2023-09-14 14:10:14 -07:00
AMDGPUTargetObjectFile.cpp
…
AMDGPUTargetObjectFile.h
…
AMDGPUTargetTransformInfo.cpp
[AMDGPU] Fix cost of fast unsafe f32 fdiv (#68988)
2023-10-15 12:25:36 +01:00
AMDGPUTargetTransformInfo.h
AMDGPU: Fix not applying the correct default memcpy expansion threshold
2023-07-06 12:14:14 -04:00
AMDGPUUnifyDivergentExitNodes.cpp
[LowerSwitch] Don't let pass manager handle the dependency (#68662)
2023-10-25 09:24:36 +08:00
AMDGPUUnifyDivergentExitNodes.h
[llvm] Fix include guards
2023-06-13 10:47:18 +01:00
AMDGPUUnifyMetadata.cpp
…
AMDKernelCodeT.h
…
BUFInstructions.td
[AMDGPU] Remove unnecessary conditionality on atomic CSUB pseudo-ops (#69914)
2023-10-23 16:18:24 +01:00
CaymanInstructions.td
…
CMakeLists.txt
[HIP][LLVM][Opt] Add LLVM support for hipstdpar
2023-10-12 11:26:48 +01:00
DSInstructions.td
SelectionDAG: Swap operands of atomic_store
2023-08-31 17:30:10 -04:00
EvergreenInstructions.td
…
EXPInstructions.td
…
FLATInstructions.td
[AMDGPU][NFCI] Decouple actual register encodings from HWEncoding values. (#69452)
2023-10-25 13:24:50 +01:00
GCNCreateVOPD.cpp
[llvm] Stop including llvm/ADT/StringMap.h (NFC)
2023-10-22 11:53:56 -07:00
GCNDPPCombine.cpp
[AMDGPU] Fix -Wunused-function in GCNDPPCombine.cpp (NFC)
2023-09-29 18:24:18 +08:00
GCNHazardRecognizer.cpp
[TableGen] Rename ResourceCycles and StartAtCycle to clarify semantics
2023-08-24 19:21:36 -07:00
GCNHazardRecognizer.h
…
GCNILPSched.cpp
…
GCNIterativeScheduler.cpp
[AMDGPU] Make use of MachineInstr::all_defs and all_uses. NFCI.
2023-06-05 10:32:33 +01:00
GCNIterativeScheduler.h
…
GCNMinRegStrategy.cpp
…
GCNNSAReassign.cpp
[AMDGPU] Make use of GCNSubtarget::hasNSAEncoding. NFC.
2023-03-21 10:00:56 +00:00
GCNPreRALongBranchReg.cpp
[AMDGPU] Reserve SGPR pair when long branches are present
2023-06-29 16:50:46 -05:00
GCNPreRAOptimizations.cpp
…
GCNProcessors.td
[AMDGPU] Add target features for GDS and GWS
2023-08-02 09:02:07 +01:00
GCNRegPressure.cpp
[AMDGPU] Tweak tuple weight calculation. NFC. (#66490)
2023-09-15 16:30:06 +01:00
GCNRegPressure.h
…
GCNRewritePartialRegUses.cpp
[AMDGPU] Fix register class for a subreg in GCNRewritePartialRegUses.
2023-07-06 08:48:45 +02:00
GCNSchedStrategy.cpp
[AMDGPU][IGLP] SingleWaveOpt: Cache DSW Counters from PreRA (#67759)
2023-10-06 17:34:14 -07:00
GCNSchedStrategy.h
…
GCNSubtarget.h
[AMDGPU] Add encoding/decoding support for non-result-returning ATOMIC_CSUB instructions (#68684)
2023-10-11 11:37:27 +01:00
GCNVOPDUtils.cpp
[AMDGPU] Fix VOPD dependency checks during combine
2023-06-15 11:16:33 -07:00
GCNVOPDUtils.h
…
InstCombineTables.td
…
LDSDIRInstructions.td
[AMDGPU][AsmParser][NFC] Simplify v_interp-related operand definitions.
2023-06-15 11:04:56 +01:00
MIMGInstructions.td
[AMDGPU][AsmParser][NFC] Translate parsed MIMG instructions to MCInsts automatically.
2023-07-13 19:47:31 +01:00
R600.h
[NFC][CodeGen] Change CodeGenOpt::Level/CodeGenFileType into enum classes (#66295)
2023-09-14 14:10:14 -07:00
R600.td
…
R600AsmPrinter.cpp
…
R600AsmPrinter.h
…
R600ClauseMergePass.cpp
…
R600ControlFlowFinalizer.cpp
…
R600Defines.h
…
R600EmitClauseMarkers.cpp
…
R600ExpandSpecialInstrs.cpp
…
R600FrameLowering.cpp
…
R600FrameLowering.h
…
R600InstrFormats.td
…
R600InstrInfo.cpp
[Target] Use *{Set,Map}::contains (NFC)
2023-03-14 18:06:55 -07:00
R600InstrInfo.h
…
R600InstrInfo.td
…
R600Instructions.td
AMDGPU: Add llvm.amdgcn.exp2 intrinsic
2023-06-15 07:00:07 -04:00
R600ISelDAGToDAG.cpp
[NFC][CodeGen] Change CodeGenOpt::Level/CodeGenFileType into enum classes (#66295)
2023-09-14 14:10:14 -07:00
R600ISelLowering.cpp
[llvm] Use llvm::isNullConstant (NFC)
2023-03-22 00:31:48 -07:00
R600ISelLowering.h
…
R600MachineCFGStructurizer.cpp
…
R600MachineFunctionInfo.cpp
…
R600MachineFunctionInfo.h
…
R600MachineScheduler.cpp
…
R600MachineScheduler.h
…
R600MCInstLower.cpp
…
R600OpenCLImageTypeLoweringPass.cpp
…
R600OptimizeVectorRegisters.cpp
…
R600Packetizer.cpp
…
R600Processors.td
…
R600RegisterInfo.cpp
…
R600RegisterInfo.h
…
R600RegisterInfo.td
…
R600Schedule.td
…
R600Subtarget.cpp
…
R600Subtarget.h
…
R600TargetMachine.cpp
[NFC][CodeGen] Change CodeGenOpt::Level/CodeGenFileType into enum classes (#66295)
2023-09-14 14:10:14 -07:00
R600TargetMachine.h
[NFC][CodeGen] Change CodeGenOpt::Level/CodeGenFileType into enum classes (#66295)
2023-09-14 14:10:14 -07:00
R600TargetTransformInfo.cpp
[LV][NFC] Use ElementCount for getMaxInterleaveFactor
2023-02-22 10:15:05 +00:00
R600TargetTransformInfo.h
[LV][NFC] Use ElementCount for getMaxInterleaveFactor
2023-02-22 10:15:05 +00:00
R700Instructions.td
…
SIAnnotateControlFlow.cpp
[NFC][RemoveDIs] Prefer iterator-insertion over instructions
2023-09-11 11:48:45 +01:00
SIDefines.h
[AMDGPU][NFCI] Decouple actual register encodings from HWEncoding values. (#69452)
2023-10-25 13:24:50 +01:00
SIFixSGPRCopies.cpp
[AMDGPU] Fix subreg check in the SIFixSGPRCopies (#70007)
2023-10-24 01:44:58 -07:00
SIFixVGPRCopies.cpp
AMDGPU: Make SIFixVGPRCopies preserve everything
2023-07-06 10:26:21 -04:00
SIFoldOperands.cpp
Reapply "[AMDGPU] Introduce real and keep fake True16 instructions."
2023-09-23 22:07:41 +01:00
SIFormMemoryClauses.cpp
[AMDGPU] Make use of MachineInstr::all_defs and all_uses. NFCI.
2023-06-05 10:32:33 +01:00
SIFrameLowering.cpp
[AMDGPU] [SIFrameLowering] Use LiveRegUnits instead of LivePhysRegs.
2023-09-21 11:49:46 +05:30
SIFrameLowering.h
[AMDGPU] [SIFrameLowering] Use LiveRegUnits instead of LivePhysRegs.
2023-09-21 11:49:46 +05:30
SIInsertHardClauses.cpp
…
SIInsertWaitcnts.cpp
[AMDGPU][NFCI] Decouple actual register encodings from HWEncoding values. (#69452)
2023-10-25 13:24:50 +01:00
SIInstrFormats.td
[AMDGPU][NFC] Add True16 operand definitions.
2023-09-25 16:48:46 +01:00
SIInstrInfo.cpp
[AMDGPU] Cleanup hasUnwantedEffectsWhenEXECEmpty function (#70206)
2023-10-25 22:10:16 +05:30
SIInstrInfo.h
AMDGPU: Fix temporal divergence introduced by machine-sink (#67456)
2023-10-06 15:00:08 +02:00
SIInstrInfo.td
[AMDGPU] Simplify definition of SIbuffer_atomic_*. NFC.
2023-10-17 16:24:30 +01:00
SIInstructions.td
[AMDGPU] support 64-bit immediates in SIInstrInfo::FoldImmediate (#69260)
2023-10-17 10:53:22 -07:00
SIISelLowering.cpp
Revert "[AMDGPU] Accept arbitrary sized sources in CalculateByteProvider"
2023-10-25 11:11:27 +01:00
SIISelLowering.h
[AMDGPU] Add DAG ISel support for preloaded kernel arguments
2023-09-25 09:32:59 -07:00
SILateBranchLowering.cpp
…
SILoadStoreOptimizer.cpp
[AMDGPU] Add sanity check that fixes bad shift operation in AMD backend
2023-08-11 15:26:35 -04:00
SILowerControlFlow.cpp
[NFC][CodeGen] Change CodeGenOpt::Level/CodeGenFileType into enum classes (#66295)
2023-09-14 14:10:14 -07:00
SILowerI1Copies.cpp
[AMDGPU] SILowerI1Copies: clear kill flags on COPY (#65883)
2023-09-11 12:30:08 +09:00
SILowerSGPRSpills.cpp
[AMDGPU] Introduce AMDGPU::SGPR_SPILL asm comment flag (#67091)
2023-09-29 11:15:01 +05:30
SILowerWWMCopies.cpp
Reapply "[CodeGen]Allow targets to use target specific COPY instructions for live range splitting"
2023-07-31 20:15:45 -04:00
SIMachineFunctionInfo.cpp
[AMDGPU] Add DAG ISel support for preloaded kernel arguments
2023-09-25 09:32:59 -07:00
SIMachineFunctionInfo.h
[AMDGPU] Add DAG ISel support for preloaded kernel arguments
2023-09-25 09:32:59 -07:00
SIMachineScheduler.cpp
[MachineScheduler] Rename postprocessDAG to postProcessDAG. NFC
2023-03-30 10:47:20 +08:00
SIMachineScheduler.h
…
SIMemoryLegalizer.cpp
AMDGPU: Force sc0 and sc1 on stores for gfx940 and gfx941
2023-05-12 11:53:19 -04:00
SIModeRegister.cpp
[AMDGPU] Modernize Status and BlockData (NFC)
2023-04-16 13:03:02 -07:00
SIModeRegisterDefaults.cpp
AMDGPU: Use const instead of constexpr to try fixing MSVC bot
2023-08-31 12:52:41 -04:00
SIModeRegisterDefaults.h
AMDGPU: Implement llvm.get.rounding
2023-08-30 14:06:13 -04:00
SIOptimizeExecMasking.cpp
…
SIOptimizeExecMaskingPreRA.cpp
[MC] Add MCRegisterInfo::regunits for iteration over register units
2023-06-16 05:39:50 +03:00
SIOptimizeVGPRLiveRange.cpp
[AMDGPU] Skip debug instruction uses while optimizing live range of a reg in SIOptimizeVGPRLiveRange
2023-08-07 11:35:39 +05:30
SIPeepholeSDWA.cpp
[AMDGPU] PeepholeSDWA: Don't assume inst srcs are registers (#69576)
2023-10-19 12:13:45 +02:00
SIPostRABundler.cpp
[MC] Add MCRegisterInfo::regunits for iteration over register units
2023-06-16 05:39:50 +03:00
SIPreAllocateWWMRegs.cpp
…
SIPreEmitPeephole.cpp
AMDGPU: Fix counting debug instructions in execz skip threshold
2023-08-02 08:09:41 -04:00
SIProgramInfo.cpp
[AMDGPU] Add backend support for new PAL ELF Metadata 3.0
2023-04-14 09:57:13 +01:00
SIProgramInfo.h
[AMDGPU] Add backend support for new PAL ELF Metadata 3.0
2023-04-14 09:57:13 +01:00
SIRegisterInfo.cpp
[AMDGPU] Use correct operand order for shifts (#68299)
2023-10-06 09:43:04 +02:00
SIRegisterInfo.h
[AMDGPU] [SIFrameLowering] Use LiveRegUnits instead of LivePhysRegs.
2023-09-21 11:49:46 +05:30
SIRegisterInfo.td
[AMDGPU][NFCI] Decouple actual register encodings from HWEncoding values. (#69452)
2023-10-25 13:24:50 +01:00
SISchedule.td
[AMDGPU] Add gfx1150 SALU Float instructions (#66884)
2023-09-21 11:22:15 +02:00
SIShrinkInstructions.cpp
[AMDGPU] Remove legality checks from imm folding in shrink. NFCI. (#69539)
2023-10-19 03:52:28 -07:00
SIWholeQuadMode.cpp
[MC] Use regunits instead of MCRegUnitIterator. NFC.
2023-06-16 12:21:32 +01:00
SMInstructions.td
AMDGPU: Mark scalar loads as rematerializable
2023-06-09 21:20:21 -04:00
SOPInstructions.td
[AMDGPU] Set size to all SOP pseudos (#69756)
2023-10-22 00:33:45 -07:00
VIInstrFormats.td
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VINTERPInstructions.td
[AMDGPU] Ignore unused bits in VINTERP encoding
2023-02-09 10:43:28 +00:00
VOP1Instructions.td
[AMDGPU] Set SchedRW = Write64Bit on V_MOV_B64 (#70135)
2023-10-25 10:50:53 -07:00
VOP2Instructions.td
[AMDGPU][NFC] Add True16 operand definitions.
2023-09-25 16:48:46 +01:00
VOP3Instructions.td
AMDGPU: Silence a gcc warning
2023-07-22 08:07:49 -04:00
VOP3PInstructions.td
[AMDGPU] Remove predicate on real packed fp32 instructions (#65589)
2023-09-07 03:17:25 -07:00
VOPCInstructions.td
[AMDGPU] Add patterns for V_CMP_O/U (#69157)
2023-10-16 13:07:56 +02:00
VOPDInstructions.td
[AMDGPU] Make VOPD insts with a FMAMK or FMAMK component have a fixed size
2023-08-14 13:32:41 +02:00
VOPInstructions.td
Reapply "[AMDGPU] Introduce real and keep fake True16 instructions."
2023-09-23 22:07:41 +01:00