We require d/q suffixes on the memory form of these instructions to disambiguate the memory size. We don't require it on the register forms, but need to support parsing both with and without it. Previously we always printed the d/q suffix on the register forms, but it's redundant and inconsistent with gcc and objdump. After this patch we should support the d/q for parsing, but not print it when its unneeded. llvm-svn: 360085
50 lines
1.6 KiB
LLVM
50 lines
1.6 KiB
LLVM
; NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py
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; RUN: llc < %s -mtriple=i686-apple-unknown -mattr=+sse2 | FileCheck %s --check-prefix=X86
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; RUN: llc < %s -mtriple=x86_64-apple-unknown -mattr=+sse2 | FileCheck %s --check-prefix=X64
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; Verify that we are using the efficient uitofp --> sitofp lowering illustrated
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; by the compiler_rt implementation of __floatundisf.
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; <rdar://problem/8493982>
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define float @test(i64 %a) nounwind {
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; X86-LABEL: test:
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; X86: # %bb.0: # %entry
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; X86-NEXT: pushl %ebp
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; X86-NEXT: movl %esp, %ebp
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; X86-NEXT: andl $-8, %esp
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; X86-NEXT: subl $16, %esp
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; X86-NEXT: movsd {{.*#+}} xmm0 = mem[0],zero
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; X86-NEXT: movlps %xmm0, {{[0-9]+}}(%esp)
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; X86-NEXT: xorl %eax, %eax
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; X86-NEXT: cmpl $0, 12(%ebp)
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; X86-NEXT: setns %al
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; X86-NEXT: fildll {{[0-9]+}}(%esp)
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; X86-NEXT: fadds {{\.LCPI.*}}(,%eax,4)
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; X86-NEXT: fstps {{[0-9]+}}(%esp)
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; X86-NEXT: movss {{.*#+}} xmm0 = mem[0],zero,zero,zero
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; X86-NEXT: movss %xmm0, (%esp)
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; X86-NEXT: flds (%esp)
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; X86-NEXT: movl %ebp, %esp
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; X86-NEXT: popl %ebp
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; X86-NEXT: retl
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;
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; X64-LABEL: test:
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; X64: # %bb.0: # %entry
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; X64-NEXT: testq %rdi, %rdi
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; X64-NEXT: js .LBB0_1
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; X64-NEXT: # %bb.2: # %entry
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; X64-NEXT: cvtsi2ss %rdi, %xmm0
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; X64-NEXT: retq
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; X64-NEXT: .LBB0_1:
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; X64-NEXT: movq %rdi, %rax
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; X64-NEXT: shrq %rax
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; X64-NEXT: andl $1, %edi
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; X64-NEXT: orq %rax, %rdi
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; X64-NEXT: cvtsi2ss %rdi, %xmm0
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; X64-NEXT: addss %xmm0, %xmm0
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; X64-NEXT: retq
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entry:
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%b = uitofp i64 %a to float
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ret float %b
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}
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