Zhenyang Xu a98707e285 [AggressiveInstCombine] Merge consecutive loads of mixed sizes (#129263) ...

Proof: https://alive2.llvm.org/ce/z/r7M-Sf
Closes: #128134

2025-03-05 18:56:00 +08:00

..

AArch64

[AggressiveInstCombine] Merge consecutive loads of mixed sizes (#129263)

2025-03-05 18:56:00 +08:00

ARM

…

X86

[AggressiveInstCombine] Merge consecutive loads of mixed sizes (#129263)

2025-03-05 18:56:00 +08:00

funnel.ll

…

inline-strcmp-debugloc.ll

…

logic-combine.ll

…

lower-table-based-cttz-basics.ll

…

lower-table-based-cttz-dereferencing-pointer.ll

…

lower-table-based-cttz-non-argument-value.ll

…

lower-table-based-cttz-zero-element.ll

…

masked-cmp.ll

…

memchr.ll

[AggressiveInstCombine] Add tests for memchr inline threshold (NFC) (#121711)

2025-01-29 14:06:04 +08:00

negative-lower-table-based-cttz.ll

…

patterned-load.ll

…

popcount.ll

…

pr50555.ll

…

rotate.ll

…

strncmp-1.ll

…

strncmp-2.ll

…

trunc_ashr.ll

…

trunc_assume.ll

…

trunc_const_expr.ll

…

trunc_lshr.ll

…

trunc_multi_uses.ll

…

trunc_phi.ll

…

trunc_select_cmp.ll

…

trunc_select.ll

…

trunc_shl.ll

…

trunc_udivrem.ll

…

trunc_unreachable_bb.ll

[llvm] Remove undef from llvm/test/Transforms tests (#123889)

2025-01-22 14:47:15 +00:00

trunc_vector_instrs.ll

[llvm] Remove undef from llvm/test/Transforms tests (#123889)

2025-01-22 14:47:15 +00:00

vector-or-load.ll

…