783a846507
Similarly to other recipes, update VPScalarIVStepsRecipe to also take
the runtime VF as argument. This removes some unnecessary runtime VF
computations for scalable vectors. It will also allow dropping the
UF == 1 restriction for narrowing interleave groups required in
577631f0a5.
64 lines
3.2 KiB
LLVM
64 lines
3.2 KiB
LLVM
; REQUIRES: asserts
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; RUN: opt -passes=loop-vectorize -debug-only=loop-vectorize -force-vector-interleave=1 -force-vector-width=4 -vplan-print-in-dot-format -disable-output %s 2>&1 | FileCheck %s
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target datalayout = "e-p:64:64:64-i1:8:8-i8:8:8-i16:16:16-i32:32:32-i64:64:64-f32:32:32-f64:64:64-v64:64:64-v128:128:128-a0:0:64-s0:64:64-f80:128:128-n8:16:32:64-S128"
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; Verify that -vplan-print-in-dot-format option works.
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define void @print_call_and_memory(i64 %n, ptr noalias %y, ptr noalias %x) nounwind uwtable {
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; CHECK: digraph VPlan {
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; CHECK-NEXT: graph [labelloc=t, fontsize=30; label="Vectorization Plan\nInitial VPlan for VF=\{4\},UF\>=1\nLive-in vp\<[[VF:%.+]]\> = VF\nLive-in vp\<[[VFxUF:%.+]]\> = VF * UF\nLive-in vp\<[[VEC_TC:%.+]]\> = vector-trip-count\nLive-in ir\<%n\> = original trip-count\n"]
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; CHECK-NEXT: node [shape=rect, fontname=Courier, fontsize=30]
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; CHECK-NEXT: edge [fontname=Courier, fontsize=30]
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; CHECK-NEXT: compound=true
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; CHECK-NEXT: N0 [label =
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; CHECK-NEXT: "ir-bb\<for.body.preheader\>:\l" +
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; CHECK-NEXT: "Successor(s): vector.ph\l"
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; CHECK-NEXT: ]
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; CHECK-NEXT: N0 -> N1 [ label=""]
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; CHECK-NEXT: N1 [label =
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; CHECK-NEXT: "vector.ph:\l" +
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; CHECK-NEXT: "Successor(s): vector loop\l"
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; CHECK-NEXT: ]
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; CHECK-NEXT: N1 -> N2 [ label="" lhead=cluster_N3]
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; CHECK-NEXT: subgraph cluster_N3 {
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; CHECK-NEXT: fontname=Courier
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; CHECK-NEXT: label="\<x1\> vector loop"
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; CHECK-NEXT: N2 [label =
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; CHECK-NEXT: "vector.body:\l" +
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; CHECK-NEXT: " EMIT vp\<[[CAN_IV:%.+]]\> = CANONICAL-INDUCTION ir\<0\>, vp\<[[CAN_IV_NEXT:%.+]]\>\l" +
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; CHECK-NEXT: " vp\<[[STEPS:%.+]]\> = SCALAR-STEPS vp\<[[CAN_IV]]\>, ir\<1\>, vp\<[[VF]]\>\l" +
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; CHECK-NEXT: " CLONE ir\<%arrayidx\> = getelementptr inbounds ir\<%y\>, vp\<[[STEPS]]\>\l" +
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; CHECK-NEXT: " vp\<[[VEC_PTR:%.+]]\> = vector-pointer ir\<%arrayidx\>\l" +
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; CHECK-NEXT: " WIDEN ir\<%lv\> = load vp\<[[VEC_PTR]]\>\l" +
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; CHECK-NEXT: " WIDEN-INTRINSIC ir\<%call\> = call llvm.sqrt(ir\<%lv\>)\l" +
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; CHECK-NEXT: " CLONE ir\<%arrayidx2\> = getelementptr inbounds ir\<%x\>, vp\<[[STEPS]]\>\l" +
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; CHECK-NEXT: " vp\<[[VEC_PTR2:%.+]]\> = vector-pointer ir\<%arrayidx2\>\l" +
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; CHECK-NEXT: " WIDEN store vp\<[[VEC_PTR2]]\>, ir\<%call\>\l" +
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; CHECK-NEXT: " EMIT vp\<[[CAN_IV_NEXT]]\> = add nuw vp\<[[CAN_IV]]\>, vp\<[[VFxUF]]\>\l" +
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; CHECK-NEXT: " EMIT branch-on-count vp\<[[CAN_IV_NEXT]]\>, vp\<[[VEC_TC]]\>\l" +
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; CHECK-NEXT: "No successors\l"
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; CHECK-NEXT: ]
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;
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entry:
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%cmp6 = icmp sgt i64 %n, 0
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br i1 %cmp6, label %for.body, label %for.end
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for.body: ; preds = %entry, %for.body
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%iv = phi i64 [ %iv.next, %for.body ], [ 0, %entry ]
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%arrayidx = getelementptr inbounds float, ptr %y, i64 %iv
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%lv = load float, ptr %arrayidx, align 4
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%call = tail call float @llvm.sqrt.f32(float %lv) nounwind readnone
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%arrayidx2 = getelementptr inbounds float, ptr %x, i64 %iv
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store float %call, ptr %arrayidx2, align 4
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%iv.next = add i64 %iv, 1
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%exitcond = icmp eq i64 %iv.next, %n
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br i1 %exitcond, label %for.end, label %for.body
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for.end: ; preds = %for.body, %entry
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ret void
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}
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declare float @llvm.sqrt.f32(float) nounwind readnone
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