YunQiang Su e25187bc3e LLVM/Test: Add vectorizing testcases for fminimumnum and fminimumnum (#133843) ...

Vectorizing of fminimumnum and fminimumnum have not support yet. Let's
add the testcase for it now, and we will update the testcase when we
support it.

2025-04-02 08:46:02 +08:00

..

32-bit.ll

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64-bit-vector.ll

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accelerate-vector-functions-inseltpoison.ll

[SLP]Gather scalarized calls

2025-02-04 19:09:57 -05:00

accelerate-vector-functions.ll

[SLP]Gather scalarized calls

2025-02-04 19:09:57 -05:00

alternate-vectorization-split-node.ll

Revert "[SLP]Reduce number of alternate instruction, where possible"

2025-01-31 06:37:16 -08:00

buildvector-reduce.ll

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buildvector-vectorize.ll

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commute.ll

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div.ll

[AArch64][CostModel] Alter sdiv/srem cost where the divisor is constant (#123552)

2025-03-09 22:26:39 -07:00

ext-trunc.ll

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external-non-inst-use.ll

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external-use-icmp.ll

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extractelements-to-shuffle.ll

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extracts-from-scalarizable-vector.ll

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fminimumnum.ll

LLVM/Test: Add vectorizing testcases for fminimumnum and fminimumnum (#133843)

2025-04-02 08:46:02 +08:00

fmulladd.ll

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fpsat.ll

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fshl.ll

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gather-buildvector-with-minbitwidth-user.ll

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gather-cost.ll

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gather-load-128.ll

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gather-load-min-required-vf-2.ll

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gather-reduce.ll

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gather-root.ll

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gather-with-minbith-user.ll

Revert "[SLP]Reduce number of alternate instruction, where possible"

2025-01-31 06:37:16 -08:00

getelementptr2.ll

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getelementptr.ll

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horizontal.ll

[SLP]Represent SLP graph as a tree

2025-02-21 07:15:02 -05:00

insertelement-inseltpoison.ll

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insertelement.ll

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InstructionsState-is-invalid-0.ll

[SLP]Improved reduction cost/codegen

2025-02-14 11:03:33 -08:00

invalid_type.ll

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landing_pad.ll

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lit.local.cfg

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load-store-q.ll

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loadi8.ll

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loadorder.ll

Revert "[SLP]Reduce number of alternate instruction, where possible"

2025-01-31 06:37:16 -08:00

matmul.ll

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memory-runtime-checks-in-loops.ll

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memory-runtime-checks.ll

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minbitwidth-cast-node-length.ll

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minimum-sizes.ll

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mismatched-intrinsics.ll

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mul.ll

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multiple_reduction.ll

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nontemporal.ll

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phi-use-order-scalable.ll

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PR38339.ll

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reduce-add-i64.ll

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reduce-fadd.ll

[SLP]Improved reduction cost/codegen

2025-02-14 11:03:33 -08:00

remarks.ll

[SLP]Represent SLP graph as a tree

2025-02-21 07:15:02 -05:00

reorder-fmuladd-crash.ll

[SLP]Represent SLP graph as a tree

2025-02-21 07:15:02 -05:00

reused-scalar-repeated-in-node.ll

[SLP]Support revectorization of the previously vectorized scalars

2025-04-01 14:30:06 -04:00

scalable-external-user.ll

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scalable-vector.ll

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scalarization-overhead.ll

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sdiv-pow2.ll

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shuffle-vectors-mask-size.ll

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slp-abs.ll

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slp-and-reduction.ll

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slp-fma-loss.ll

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slp-frem.ll

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slp-or-reduction.ll

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slp-xor-reduction.ll

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spillcost-di.ll

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spillcost-order.ll

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splat-loads.ll

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store-ptr.ll

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transpose-inseltpoison.ll

[SLP]Support revectorization of the previously vectorized scalars

2025-04-01 14:30:06 -04:00

transpose.ll

[SLP]Support revectorization of the previously vectorized scalars

2025-04-01 14:30:06 -04:00

trunc-insertion.ll

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tsc-s116.ll

[SLP]Reduce number of alternate instruction, where possible

2025-03-12 08:18:51 -07:00

tsc-s352.ll

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unreachable-blocks-with-phis.ll

[SLP]Fix a crash when comparing phis from unreachable blocks

2025-02-18 08:20:48 -08:00

unsigned-after-sext-node.ll

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uselistorder.ll

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user-node-not-in-bitwidths.ll

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vec3-base.ll

Revert "[SLP] Make getSameOpcode support interchangeable instructions. (#132887)"

2025-03-26 10:24:25 +02:00

vec3-calls.ll

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vec3-reorder-reshuffle.ll

[SLP]Support revectorization of the previously vectorized scalars

2025-04-01 14:30:06 -04:00

vec15-base.ll

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vecreduceadd.ll

[AArch64] Add extending reduction costs for addlv and dot

2025-02-15 20:33:03 +00:00

vector-getelementptr.ll

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vectorizable-selects-min-max.ll

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vectorizable-selects-uniform-cmps.ll

[SLP]Do not include subvectors for fully matched buildvectors

2025-01-13 07:24:16 -08:00

vectorize-free-extracts-inserts.ll

[SLP]Represent SLP graph as a tree

2025-02-21 07:15:02 -05:00

widen.ll

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