Jay Foad dbdffe3ee9 [AMDGPU] Add 192-bit register classes ...

Differential Revision: https://reviews.llvm.org/D78312

2020-04-22 13:10:37 +01:00

..

AArch64

[AArch64][SVE] Add SVE intrinsic for LD1RQ

2020-04-22 11:29:27 +01:00

AMDGPU

[AMDGPU] Add 192-bit register classes

2020-04-22 13:10:37 +01:00

ARC

…

ARM

[ARM] Fix MIR tests with invalid live-ins.

2020-04-21 12:13:35 -07:00

AVR

[AVR] Do not place functions in .progmem.data

2020-04-20 13:56:38 +02:00

BPF

BPF: fix a CORE optimization bug

2020-04-20 19:54:51 -07:00

Generic

[mir-strip-debug] Optionally preserve debug info that wasn't from debugify/mir-debugify

2020-04-10 15:24:14 -07:00

Hexagon

[Pipeliner] Fix the bug in pragma that disables the pipeliner.

2020-04-10 12:52:16 -05:00

Inputs

…

Lanai

…

Mips

[MIR] Add comments to INLINEASM immediate flag MachineOperands

2020-04-16 13:46:14 +02:00

MIR

[X86] Clean up some mir tests with INLINEASM to avoid regdef or to correct the immediate for the regdef.

2020-04-17 21:55:44 -07:00

MSP430

…

NVPTX

[llvm] Fix missing FileCheck directive colons

2020-04-06 09:59:08 -06:00

PowerPC

[PowerPC] Exploit RLDIMI for OR with large immediates

2020-04-22 14:16:52 +08:00

RISCV

[RISCV][AsmParser] Implement .option (no)pic

2020-04-17 12:08:30 +00:00

SPARC

…

SystemZ

[SystemZ] Bugfix in adjustSubwordCmp()

2020-04-15 12:58:39 +02:00

Thumb

[ARM] unwinding .pad instructions missing in execute-only prologue

2020-04-07 11:51:59 +01:00

Thumb2

[ARM] Fix MIR tests with invalid live-ins.

2020-04-21 12:13:35 -07:00

VE

[VE] Update integer arithmetic instructions

2020-04-15 09:47:51 +02:00

WebAssembly

[WebAssembly] Add int32 DW_OP_WASM_location variant

2020-04-16 16:32:17 -07:00

WinCFGuard

…

WinEH

…

X86

[NFC][llvm][X86] Adding missing -mtiple to X86 test.

2020-04-22 11:55:57 +01:00

XCore

…