3f34e1b883
Summary: It does not currently make sense to use WebAssembly features in some functions but not others, so this CL adds an IR pass that takes the union of all used feature sets and applies it to each function in the module. This allows us to prevent atomics from being lowered away if some function has opted in to using them. When atomics is not enabled anywhere, we detect whether there exists any atomic operations or thread local storage that would be stripped and disallow linking with objects that contain atomics if and only if atomics or tls are stripped. When atomics is enabled, mark it as used but do not require it of other objects in the link. These changes allow libraries that do not use atomics to be built once and linked into both single-threaded and multithreaded binaries. Reviewers: aheejin, sbc100, dschuff Subscribers: jgravelle-google, hiraditya, sunfish, jfb, llvm-commits Tags: #llvm Differential Revision: https://reviews.llvm.org/D59625 llvm-svn: 357226
93 lines
2.5 KiB
LLVM
93 lines
2.5 KiB
LLVM
; RUN: llc < %s | FileCheck %s --check-prefixes CHECK,ATTRS
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; RUN: llc < %s -mattr=+simd128 | FileCheck %s --check-prefixes CHECK,SIMD128
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; RUN: llc < %s -mcpu=bleeding-edge | FileCheck %s --check-prefixes CHECK,BLEEDING-EDGE
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; Test that codegen emits target features from the command line or
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; function attributes correctly and that features are enabled for the
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; entire module if they are enabled for any function in the module.
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target datalayout = "e-m:e-p:32:32-i64:64-n32:64-S128"
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target triple = "wasm32-unknown-unknown"
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define void @foo(i32* %p1) #0 {
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%a = atomicrmw min i32* undef, i32 42 seq_cst
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%v = fptoui float undef to i32
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store i32 %v, i32* %p1
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ret void
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}
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define void @bar(i32* %p1) #1 {
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%a = atomicrmw min i32* undef, i32 42 seq_cst
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%v = fptoui float undef to i32
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store i32 %v, i32* %p1
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ret void
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}
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attributes #0 = { "target-features"="+atomics" }
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attributes #1 = { "target-features"="+nontrapping-fptoint" }
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; CHECK-LABEL: foo:
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; Expanded atomicrmw min
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; ATTRS: loop
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; ATTRS: i32.atomic.rmw.cmpxchg
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; SIMD128-NOT: i32.atomic.rmw.cmpxchg
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; ATTRS: end_loop
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; nontrapping fptoint
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; ATTRS: i32.trunc_sat_f32_u
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; SIMD128-NOT: i32.trunc_sat_f32_u
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; ATTRS: i32.store
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; `bar` should be the same as `foo`
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; CHECK-LABEL: bar:
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; Expanded atomicrmw min
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; ATTRS: loop
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; ATTRS: i32.atomic.rmw.cmpxchg
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; SIMD128-NOT: i32.atomic.rmw.cmpxchg
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; ATTRS: end_loop
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; nontrapping fptoint
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; ATTRS: i32.trunc_sat_f32_u
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; SIMD128-NOT: i32.trunc_sat_f32_u
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; ATTRS: i32.store
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; CHECK-LABEL: .custom_section.target_features,"",@
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; +atomics, +nontrapping-fptoint
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; ATTRS-NEXT: .int8 2
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; ATTRS-NEXT: .int8 43
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; ATTRS-NEXT: .int8 7
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; ATTRS-NEXT: .ascii "atomics"
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; ATTRS-NEXT: .int8 43
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; ATTRS-NEXT: .int8 19
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; ATTRS-NEXT: .ascii "nontrapping-fptoint"
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; -atomics, +simd128
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; SIMD128-NEXT: .int8 2
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; SIMD128-NEXT: .int8 45
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; SIMD128-NEXT: .int8 7
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; SIMD128-NEXT: .ascii "atomics"
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; SIMD128-NEXT: .int8 43
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; SIMD128-NEXT: .int8 7
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; SIMD128-NEXT: .ascii "simd128"
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; +atomics, +nontrapping-fptoint, +sign-ext, +simd128
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; BLEEDING-EDGE-NEXT: .int8 4
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; BLEEDING-EDGE-NEXT: .int8 43
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; BLEEDING-EDGE-NEXT: .int8 7
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; BLEEDING-EDGE-NEXT: .ascii "atomics"
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; BLEEDING-EDGE-NEXT: .int8 43
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; BLEEDING-EDGE-NEXT: .int8 19
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; BLEEDING-EDGE-NEXT: .ascii "nontrapping-fptoint"
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; BLEEDING-EDGE-NEXT: .int8 43
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; BLEEDING-EDGE-NEXT: .int8 8
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; BLEEDING-EDGE-NEXT: .ascii "sign-ext"
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; BLEEDING-EDGE-NEXT: .int8 43
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; BLEEDING-EDGE-NEXT: .int8 7
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; BLEEDING-EDGE-NEXT: .ascii "simd128"
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; CHECK-NEXT: .text
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