Summary: This commit adds new intrinsics llvm.amdgcn.raw.tbuffer.load llvm.amdgcn.struct.tbuffer.load llvm.amdgcn.raw.tbuffer.store llvm.amdgcn.struct.tbuffer.store with the following changes from the llvm.amdgcn.tbuffer.* intrinsics: * there are separate raw and struct versions: raw does not have an index arg and sets idxen=0 in the instruction, and struct always sets idxen=1 in the instruction even if the index is 0, to allow for the fact that gfx9 does bounds checking differently depending on whether idxen is set; * there is a combined format arg (dfmt+nfmt) * there is a combined cachepolicy arg (glc+slc) * there are now only two offset args: one for the offset that is included in bounds checking and swizzling, to be split between the instruction's voffset and immoffset fields, and one for the offset that is excluded from bounds checking and swizzling, to go into the instruction's soffset field. The AMDISD::TBUFFER_* SD nodes always have an index operand, all three offset operands, combined format operand, combined cachepolicy operand, and an extra idxen operand. The tbuffer pseudo- and real instructions now also have a combined format operand. The obsolescent llvm.amdgcn.tbuffer.* and llvm.SI.tbuffer.store intrinsics continue to work. V2: Separate raw and struct intrinsics. V3: Moved extract_glc and extract_slc defs to a more sensible place. V4: Rebased on D49995. V5: Only two separate offset args instead of three. V6: Pseudo- and real instructions have joint format operand. V7: Restored optionality of dfmt and nfmt in assembler. V8: Addressed minor review comments. Subscribers: arsenm, kzhuravl, wdng, nhaehnle, yaxunl, dstuttard, t-tye, llvm-commits Differential Revision: https://reviews.llvm.org/D49026 Change-Id: If22ad77e349fac3a5d2f72dda53c010377d470d4 llvm-svn: 340268
251 lines
13 KiB
C++
251 lines
13 KiB
C++
//===-- AMDGPUInstPrinter.h - AMDGPU MC Inst -> ASM interface ---*- C++ -*-===//
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//
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// The LLVM Compiler Infrastructure
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//
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// This file is distributed under the University of Illinois Open Source
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// License. See LICENSE.TXT for details.
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//
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//===----------------------------------------------------------------------===//
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//
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/// \file
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//===----------------------------------------------------------------------===//
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#ifndef LLVM_LIB_TARGET_AMDGPU_INSTPRINTER_AMDGPUINSTPRINTER_H
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#define LLVM_LIB_TARGET_AMDGPU_INSTPRINTER_AMDGPUINSTPRINTER_H
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#include "llvm/MC/MCInstPrinter.h"
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namespace llvm {
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class AMDGPUInstPrinter : public MCInstPrinter {
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public:
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AMDGPUInstPrinter(const MCAsmInfo &MAI,
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const MCInstrInfo &MII, const MCRegisterInfo &MRI)
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: MCInstPrinter(MAI, MII, MRI) {}
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//Autogenerated by tblgen
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void printInstruction(const MCInst *MI, const MCSubtargetInfo &STI,
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raw_ostream &O);
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static const char *getRegisterName(unsigned RegNo);
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void printInst(const MCInst *MI, raw_ostream &O, StringRef Annot,
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const MCSubtargetInfo &STI) override;
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static void printRegOperand(unsigned RegNo, raw_ostream &O,
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const MCRegisterInfo &MRI);
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private:
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void printU4ImmOperand(const MCInst *MI, unsigned OpNo,
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const MCSubtargetInfo &STI, raw_ostream &O);
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void printU8ImmOperand(const MCInst *MI, unsigned OpNo, raw_ostream &O);
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void printU16ImmOperand(const MCInst *MI, unsigned OpNo,
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const MCSubtargetInfo &STI, raw_ostream &O);
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void printU4ImmDecOperand(const MCInst *MI, unsigned OpNo, raw_ostream &O);
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void printU8ImmDecOperand(const MCInst *MI, unsigned OpNo, raw_ostream &O);
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void printU16ImmDecOperand(const MCInst *MI, unsigned OpNo, raw_ostream &O);
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void printS13ImmDecOperand(const MCInst *MI, unsigned OpNo, raw_ostream &O);
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void printU32ImmOperand(const MCInst *MI, unsigned OpNo,
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const MCSubtargetInfo &STI, raw_ostream &O);
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void printNamedBit(const MCInst *MI, unsigned OpNo, raw_ostream &O,
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StringRef BitName);
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void printOffen(const MCInst *MI, unsigned OpNo, raw_ostream &O);
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void printIdxen(const MCInst *MI, unsigned OpNo, raw_ostream &O);
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void printAddr64(const MCInst *MI, unsigned OpNo, raw_ostream &O);
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void printMBUFOffset(const MCInst *MI, unsigned OpNo, raw_ostream &O);
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void printOffset(const MCInst *MI, unsigned OpNo, const MCSubtargetInfo &STI,
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raw_ostream &O);
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void printOffsetS13(const MCInst *MI, unsigned OpNo, const MCSubtargetInfo &STI,
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raw_ostream &O);
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void printOffset0(const MCInst *MI, unsigned OpNo, const MCSubtargetInfo &STI,
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raw_ostream &O);
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void printOffset1(const MCInst *MI, unsigned OpNo, const MCSubtargetInfo &STI,
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raw_ostream &O);
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void printSMRDOffset8(const MCInst *MI, unsigned OpNo,
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const MCSubtargetInfo &STI, raw_ostream &O);
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void printSMRDOffset20(const MCInst *MI, unsigned OpNo,
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const MCSubtargetInfo &STI, raw_ostream &O);
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void printSMRDLiteralOffset(const MCInst *MI, unsigned OpNo,
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const MCSubtargetInfo &STI, raw_ostream &O);
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void printGDS(const MCInst *MI, unsigned OpNo, const MCSubtargetInfo &STI,
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raw_ostream &O);
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void printGLC(const MCInst *MI, unsigned OpNo, const MCSubtargetInfo &STI,
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raw_ostream &O);
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void printSLC(const MCInst *MI, unsigned OpNo, const MCSubtargetInfo &STI,
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raw_ostream &O);
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void printTFE(const MCInst *MI, unsigned OpNo, const MCSubtargetInfo &STI,
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raw_ostream &O);
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void printDMask(const MCInst *MI, unsigned OpNo, const MCSubtargetInfo &STI,
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raw_ostream &O);
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void printUNorm(const MCInst *MI, unsigned OpNo, const MCSubtargetInfo &STI,
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raw_ostream &O);
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void printDA(const MCInst *MI, unsigned OpNo, const MCSubtargetInfo &STI,
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raw_ostream &O);
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void printR128(const MCInst *MI, unsigned OpNo, const MCSubtargetInfo &STI,
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raw_ostream &O);
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void printLWE(const MCInst *MI, unsigned OpNo,
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const MCSubtargetInfo &STI, raw_ostream &O);
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void printD16(const MCInst *MI, unsigned OpNo,
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const MCSubtargetInfo &STI, raw_ostream &O);
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void printExpCompr(const MCInst *MI, unsigned OpNo,
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const MCSubtargetInfo &STI, raw_ostream &O);
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void printExpVM(const MCInst *MI, unsigned OpNo,
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const MCSubtargetInfo &STI, raw_ostream &O);
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void printFORMAT(const MCInst *MI, unsigned OpNo,
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const MCSubtargetInfo &STI, raw_ostream &O);
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void printRegOperand(unsigned RegNo, raw_ostream &O);
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void printVOPDst(const MCInst *MI, unsigned OpNo, const MCSubtargetInfo &STI,
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raw_ostream &O);
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void printVINTRPDst(const MCInst *MI, unsigned OpNo, const MCSubtargetInfo &STI,
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raw_ostream &O);
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void printImmediate16(uint32_t Imm, const MCSubtargetInfo &STI,
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raw_ostream &O);
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void printImmediateV216(uint32_t Imm, const MCSubtargetInfo &STI,
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raw_ostream &O);
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void printImmediate32(uint32_t Imm, const MCSubtargetInfo &STI,
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raw_ostream &O);
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void printImmediate64(uint64_t Imm, const MCSubtargetInfo &STI,
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raw_ostream &O);
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void printOperand(const MCInst *MI, unsigned OpNo, const MCSubtargetInfo &STI,
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raw_ostream &O);
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void printOperandAndFPInputMods(const MCInst *MI, unsigned OpNo,
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const MCSubtargetInfo &STI, raw_ostream &O);
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void printOperandAndIntInputMods(const MCInst *MI, unsigned OpNo,
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const MCSubtargetInfo &STI, raw_ostream &O);
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void printDPPCtrl(const MCInst *MI, unsigned OpNo, const MCSubtargetInfo &STI,
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raw_ostream &O);
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void printRowMask(const MCInst *MI, unsigned OpNo, const MCSubtargetInfo &STI,
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raw_ostream &O);
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void printBankMask(const MCInst *MI, unsigned OpNo,
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const MCSubtargetInfo &STI, raw_ostream &O);
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void printBoundCtrl(const MCInst *MI, unsigned OpNo,
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const MCSubtargetInfo &STI, raw_ostream &O);
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void printSDWASel(const MCInst *MI, unsigned OpNo, raw_ostream &O);
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void printSDWADstSel(const MCInst *MI, unsigned OpNo,
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const MCSubtargetInfo &STI, raw_ostream &O);
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void printSDWASrc0Sel(const MCInst *MI, unsigned OpNo,
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const MCSubtargetInfo &STI, raw_ostream &O);
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void printSDWASrc1Sel(const MCInst *MI, unsigned OpNo,
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const MCSubtargetInfo &STI, raw_ostream &O);
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void printSDWADstUnused(const MCInst *MI, unsigned OpNo,
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const MCSubtargetInfo &STI, raw_ostream &O);
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void printPackedModifier(const MCInst *MI, StringRef Name, unsigned Mod,
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raw_ostream &O);
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void printOpSel(const MCInst *MI, unsigned OpNo,
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const MCSubtargetInfo &STI, raw_ostream &O);
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void printOpSelHi(const MCInst *MI, unsigned OpNo,
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const MCSubtargetInfo &STI, raw_ostream &O);
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void printNegLo(const MCInst *MI, unsigned OpNo,
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const MCSubtargetInfo &STI, raw_ostream &O);
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void printNegHi(const MCInst *MI, unsigned OpNo,
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const MCSubtargetInfo &STI, raw_ostream &O);
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void printInterpSlot(const MCInst *MI, unsigned OpNo,
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const MCSubtargetInfo &STI, raw_ostream &O);
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void printInterpAttr(const MCInst *MI, unsigned OpNo,
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const MCSubtargetInfo &STI, raw_ostream &O);
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void printInterpAttrChan(const MCInst *MI, unsigned OpNo,
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const MCSubtargetInfo &STI, raw_ostream &O);
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void printVGPRIndexMode(const MCInst *MI, unsigned OpNo,
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const MCSubtargetInfo &STI, raw_ostream &O);
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void printMemOperand(const MCInst *MI, unsigned OpNo,
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const MCSubtargetInfo &STI, raw_ostream &O);
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template <unsigned N>
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void printExpSrcN(const MCInst *MI, unsigned OpNo,
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const MCSubtargetInfo &STI, raw_ostream &O);
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void printExpSrc0(const MCInst *MI, unsigned OpNo,
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const MCSubtargetInfo &STI, raw_ostream &O);
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void printExpSrc1(const MCInst *MI, unsigned OpNo,
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const MCSubtargetInfo &STI, raw_ostream &O);
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void printExpSrc2(const MCInst *MI, unsigned OpNo,
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const MCSubtargetInfo &STI, raw_ostream &O);
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void printExpSrc3(const MCInst *MI, unsigned OpNo,
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const MCSubtargetInfo &STI, raw_ostream &O);
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void printExpTgt(const MCInst *MI, unsigned OpNo,
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const MCSubtargetInfo &STI, raw_ostream &O);
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public:
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static void printIfSet(const MCInst *MI, unsigned OpNo, raw_ostream &O,
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StringRef Asm, StringRef Default = "");
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static void printIfSet(const MCInst *MI, unsigned OpNo, raw_ostream &O,
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char Asm);
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protected:
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void printAbs(const MCInst *MI, unsigned OpNo, const MCSubtargetInfo &STI,
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raw_ostream &O);
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void printHigh(const MCInst *MI, unsigned OpNo, const MCSubtargetInfo &STI,
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raw_ostream &O);
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void printClamp(const MCInst *MI, unsigned OpNo, const MCSubtargetInfo &STI,
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raw_ostream &O);
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void printClampSI(const MCInst *MI, unsigned OpNo, const MCSubtargetInfo &STI,
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raw_ostream &O);
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void printOModSI(const MCInst *MI, unsigned OpNo, const MCSubtargetInfo &STI,
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raw_ostream &O);
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void printLiteral(const MCInst *MI, unsigned OpNo, const MCSubtargetInfo &STI,
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raw_ostream &O);
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void printLast(const MCInst *MI, unsigned OpNo, const MCSubtargetInfo &STI,
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raw_ostream &O);
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void printNeg(const MCInst *MI, unsigned OpNo, const MCSubtargetInfo &STI,
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raw_ostream &O);
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void printOMOD(const MCInst *MI, unsigned OpNo, const MCSubtargetInfo &STI,
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raw_ostream &O);
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void printRel(const MCInst *MI, unsigned OpNo, const MCSubtargetInfo &STI,
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raw_ostream &O);
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void printUpdateExecMask(const MCInst *MI, unsigned OpNo,
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const MCSubtargetInfo &STI, raw_ostream &O);
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void printUpdatePred(const MCInst *MI, unsigned OpNo,
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const MCSubtargetInfo &STI, raw_ostream &O);
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void printWrite(const MCInst *MI, unsigned OpNo, const MCSubtargetInfo &STI,
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raw_ostream &O);
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void printBankSwizzle(const MCInst *MI, unsigned OpNo,
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const MCSubtargetInfo &STI, raw_ostream &O);
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void printRSel(const MCInst *MI, unsigned OpNo, const MCSubtargetInfo &STI,
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raw_ostream &O);
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void printCT(const MCInst *MI, unsigned OpNo, const MCSubtargetInfo &STI,
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raw_ostream &O);
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void printKCache(const MCInst *MI, unsigned OpNo, const MCSubtargetInfo &STI,
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raw_ostream &O);
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void printSendMsg(const MCInst *MI, unsigned OpNo, const MCSubtargetInfo &STI,
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raw_ostream &O);
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void printSwizzle(const MCInst *MI, unsigned OpNo, const MCSubtargetInfo &STI,
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raw_ostream &O);
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void printWaitFlag(const MCInst *MI, unsigned OpNo,
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const MCSubtargetInfo &STI, raw_ostream &O);
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void printHwreg(const MCInst *MI, unsigned OpNo, const MCSubtargetInfo &STI,
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raw_ostream &O);
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};
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class R600InstPrinter : public MCInstPrinter {
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public:
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R600InstPrinter(const MCAsmInfo &MAI, const MCInstrInfo &MII,
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const MCRegisterInfo &MRI)
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: MCInstPrinter(MAI, MII, MRI) {}
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void printInst(const MCInst *MI, raw_ostream &O, StringRef Annot,
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const MCSubtargetInfo &STI) override;
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void printInstruction(const MCInst *MI, raw_ostream &O);
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static const char *getRegisterName(unsigned RegNo);
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void printAbs(const MCInst *MI, unsigned OpNo, raw_ostream &O);
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void printBankSwizzle(const MCInst *MI, unsigned OpNo, raw_ostream &O);
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void printClamp(const MCInst *MI, unsigned OpNo, raw_ostream &O);
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void printCT(const MCInst *MI, unsigned OpNo, raw_ostream &O);
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void printKCache(const MCInst *MI, unsigned OpNo, raw_ostream &O);
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void printLast(const MCInst *MI, unsigned OpNo, raw_ostream &O);
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void printLiteral(const MCInst *MI, unsigned OpNo, raw_ostream &O);
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void printMemOperand(const MCInst *MI, unsigned OpNo, raw_ostream &O);
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void printNeg(const MCInst *MI, unsigned OpNo, raw_ostream &O);
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void printOMOD(const MCInst *MI, unsigned OpNo, raw_ostream &O);
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void printOperand(const MCInst *MI, unsigned OpNo, raw_ostream &O);
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void printRel(const MCInst *MI, unsigned OpNo, raw_ostream &O);
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void printRSel(const MCInst *MI, unsigned OpNo, raw_ostream &O);
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void printUpdateExecMask(const MCInst *MI, unsigned OpNo, raw_ostream &O);
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void printUpdatePred(const MCInst *MI, unsigned OpNo, raw_ostream &O);
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void printWrite(const MCInst *MI, unsigned OpNo, raw_ostream &O);
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};
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} // End namespace llvm
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#endif
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