4cb7cf276d
This commit gets us back to pure CLC and fixes offset calculations. The next commit will re-enable the assembly implementation for R600, fix bugs related to 64-bit address spaces, and also fix the incorrect assumption that address space identifiers are the same in all architectures. llvm-svn: 186415
54 lines
1.7 KiB
Common Lisp
54 lines
1.7 KiB
Common Lisp
#include <clc/clc.h>
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#pragma OPENCL EXTENSION cl_khr_byte_addressable_store : enable
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#define VSTORE_VECTORIZE(PRIM_TYPE, ADDR_SPACE) \
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_CLC_OVERLOAD _CLC_DEF void vstore2(PRIM_TYPE##2 vec, size_t offset, ADDR_SPACE PRIM_TYPE *mem) { \
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mem[2*offset] = vec.s0; \
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mem[2*offset+1] = vec.s1; \
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} \
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\
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_CLC_OVERLOAD _CLC_DEF void vstore3(PRIM_TYPE##3 vec, size_t offset, ADDR_SPACE PRIM_TYPE *mem) { \
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mem[3*offset] = vec.s0; \
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mem[3*offset+1] = vec.s1; \
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mem[3*offset+2] = vec.s2; \
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} \
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\
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_CLC_OVERLOAD _CLC_DEF void vstore4(PRIM_TYPE##4 vec, size_t offset, ADDR_SPACE PRIM_TYPE *mem) { \
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vstore2(vec.lo, 0, &mem[offset*4]); \
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vstore2(vec.hi, 1, &mem[offset*4]); \
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} \
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\
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_CLC_OVERLOAD _CLC_DEF void vstore8(PRIM_TYPE##8 vec, size_t offset, ADDR_SPACE PRIM_TYPE *mem) { \
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vstore4(vec.lo, 0, &mem[offset*8]); \
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vstore4(vec.hi, 1, &mem[offset*8]); \
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} \
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\
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_CLC_OVERLOAD _CLC_DEF void vstore16(PRIM_TYPE##16 vec, size_t offset, ADDR_SPACE PRIM_TYPE *mem) { \
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vstore8(vec.lo, 0, &mem[offset*16]); \
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vstore8(vec.hi, 1, &mem[offset*16]); \
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} \
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#define VSTORE_ADDR_SPACES(__CLC_SCALAR___CLC_GENTYPE) \
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VSTORE_VECTORIZE(__CLC_SCALAR___CLC_GENTYPE, __private) \
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VSTORE_VECTORIZE(__CLC_SCALAR___CLC_GENTYPE, __local) \
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VSTORE_VECTORIZE(__CLC_SCALAR___CLC_GENTYPE, __global) \
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#define VSTORE_TYPES() \
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VSTORE_ADDR_SPACES(char) \
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VSTORE_ADDR_SPACES(uchar) \
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VSTORE_ADDR_SPACES(short) \
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VSTORE_ADDR_SPACES(ushort) \
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VSTORE_ADDR_SPACES(int) \
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VSTORE_ADDR_SPACES(uint) \
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VSTORE_ADDR_SPACES(long) \
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VSTORE_ADDR_SPACES(ulong) \
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VSTORE_ADDR_SPACES(float) \
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VSTORE_TYPES()
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#ifdef cl_khr_fp64
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#pragma OPENCL EXTENSION cl_khr_fp64 : enable
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VSTORE_ADDR_SPACES(double)
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#endif
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