6c412b6c6f
In [1], a few new insns are proposed to expand BPF ISA to
. fixing the limitation of existing insn (e.g., 16bit jmp offset)
. adding new insns which may improve code quality
(sign_ext_ld, sign_ext_mov, st)
. feature complete (sdiv, smod)
. better user experience (bswap)
This patch implemented insn encoding for
. sign-extended load
. sign-extended mov
. sdiv/smod
. bswap insns
. unconditional jump with 32bit offset
The new bswap insns are generated under cpu=v4 for __builtin_bswap.
For cpu=v3 or earlier, for __builtin_bswap, be or le insns are generated
which is not intuitive for the user.
To support 32-bit branch offset, a 32-bit ja (JMPL) insn is implemented.
For conditional branch which is beyond 16-bit offset, llvm will do
some transformation 'cond_jmp' -> 'cond_jmp + jmpl' to simulate 32bit
conditional jmp. See BPFMIPeephole.cpp for details. The algorithm is
hueristic based. I have tested bpf selftest pyperf600 with unroll account
600 which can indeed generate 32-bit jump insn, e.g.,
13: 06 00 00 00 9b cd 00 00 gotol +0xcd9b <LBB0_6619>
Eduard is working on to add 'st' insn to cpu=v4.
A list of llc flags:
disable-ldsx, disable-movsx, disable-bswap,
disable-sdiv-smod, disable-gotol
can be used to disable a particular insn for cpu v4.
For example, user can do:
llc -march=bpf -mcpu=v4 -disable-movsx t.ll
to enable cpu v4 without movsx insns.
References:
[1] https://lore.kernel.org/bpf/4bfe98be-5333-1c7e-2f6d-42486c8ec039@meta.com/
Differential Revision: https://reviews.llvm.org/D144829
120 lines
3.5 KiB
C++
120 lines
3.5 KiB
C++
//===--- BPF.h - Declare BPF target feature support -------------*- C++ -*-===//
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//
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// Part of the LLVM Project, under the Apache License v2.0 with LLVM Exceptions.
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// See https://llvm.org/LICENSE.txt for license information.
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// SPDX-License-Identifier: Apache-2.0 WITH LLVM-exception
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//
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//===----------------------------------------------------------------------===//
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//
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// This file declares BPF TargetInfo objects.
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//
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//===----------------------------------------------------------------------===//
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#ifndef LLVM_CLANG_LIB_BASIC_TARGETS_BPF_H
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#define LLVM_CLANG_LIB_BASIC_TARGETS_BPF_H
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#include "clang/Basic/TargetInfo.h"
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#include "clang/Basic/TargetOptions.h"
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#include "llvm/Support/Compiler.h"
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#include "llvm/TargetParser/Triple.h"
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namespace clang {
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namespace targets {
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class LLVM_LIBRARY_VISIBILITY BPFTargetInfo : public TargetInfo {
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bool HasAlu32 = false;
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public:
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BPFTargetInfo(const llvm::Triple &Triple, const TargetOptions &)
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: TargetInfo(Triple) {
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LongWidth = LongAlign = PointerWidth = PointerAlign = 64;
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SizeType = UnsignedLong;
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PtrDiffType = SignedLong;
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IntPtrType = SignedLong;
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IntMaxType = SignedLong;
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Int64Type = SignedLong;
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RegParmMax = 5;
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if (Triple.getArch() == llvm::Triple::bpfeb) {
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resetDataLayout("E-m:e-p:64:64-i64:64-i128:128-n32:64-S128");
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} else {
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resetDataLayout("e-m:e-p:64:64-i64:64-i128:128-n32:64-S128");
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}
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MaxAtomicPromoteWidth = 64;
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MaxAtomicInlineWidth = 64;
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TLSSupported = false;
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}
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void getTargetDefines(const LangOptions &Opts,
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MacroBuilder &Builder) const override;
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bool hasFeature(StringRef Feature) const override {
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return Feature == "bpf" || Feature == "alu32" || Feature == "dwarfris";
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}
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void setFeatureEnabled(llvm::StringMap<bool> &Features, StringRef Name,
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bool Enabled) const override {
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Features[Name] = Enabled;
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}
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bool handleTargetFeatures(std::vector<std::string> &Features,
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DiagnosticsEngine &Diags) override;
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ArrayRef<Builtin::Info> getTargetBuiltins() const override;
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std::string_view getClobbers() const override { return ""; }
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BuiltinVaListKind getBuiltinVaListKind() const override {
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return TargetInfo::VoidPtrBuiltinVaList;
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}
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bool isValidGCCRegisterName(StringRef Name) const override { return true; }
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ArrayRef<const char *> getGCCRegNames() const override {
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return std::nullopt;
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}
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bool validateAsmConstraint(const char *&Name,
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TargetInfo::ConstraintInfo &Info) const override {
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switch (*Name) {
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default:
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break;
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case 'w':
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if (HasAlu32) {
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Info.setAllowsRegister();
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}
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break;
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}
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return true;
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}
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ArrayRef<TargetInfo::GCCRegAlias> getGCCRegAliases() const override {
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return std::nullopt;
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}
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bool allowDebugInfoForExternalRef() const override { return true; }
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CallingConvCheckResult checkCallingConvention(CallingConv CC) const override {
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switch (CC) {
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default:
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return CCCR_Warning;
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case CC_C:
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case CC_OpenCLKernel:
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return CCCR_OK;
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}
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}
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bool isValidCPUName(StringRef Name) const override;
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void fillValidCPUList(SmallVectorImpl<StringRef> &Values) const override;
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bool setCPU(const std::string &Name) override {
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if (Name == "v3" || Name == "v4") {
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HasAlu32 = true;
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}
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StringRef CPUName(Name);
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return isValidCPUName(CPUName);
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}
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};
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} // namespace targets
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} // namespace clang
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#endif // LLVM_CLANG_LIB_BASIC_TARGETS_BPF_H
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