f66b767abe
Ported the D64906 technique to AArch64. It deletes 3 alignments at PT_LOAD boundaries for the default case: the size of an aarch64 binary decreases by at most 192kb. If `sh_addralign(.tdata) < sh_addralign(.tbss)`, we can potentially make `p_vaddr(PT_TLS)%p_align(PT_TLS) != 0`. ld.so that are known to have problems if p_vaddr%p_align!=0: * musl<=1.1.22 * FreeBSD 13.0-CURRENT (and before) rtld-elf arm64 New test aarch64-tls-vaddr-align.s checks that our workaround makes p_vaddr%p_align = 0. Reviewed By: ruiu Differential Revision: https://reviews.llvm.org/D64930 llvm-svn: 369344
12 lines
302 B
ArmAsm
12 lines
302 B
ArmAsm
# REQUIRES: aarch64
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# RUN: llvm-mc -filetype=obj -triple=aarch64-linux-none %s -o %t.o
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# RUN: not ld.lld -shared %t.o -o /dev/null 2>&1 | FileCheck %s
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# CHECK: improper alignment for relocation R_AARCH64_LD_PREL_LO19: 0x2007D is not aligned to 4 bytes
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ldr x8, patatino
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.data
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.zero 5
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patatino:
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