e4118a7ac0
LLD terminates with errors when it detects overflows in the finalizeAddressDependentContent calculation. Although, sometimes, those errors are not really errors, but an intermediate result of an ongoing address calculation. If we continue the fixed-point algorithm we can converge to the correct result. This patch * Removes the verification inside the fixed point algorithm. * Calls checkMemoryRegions at the end. Reviewed By: peter.smith, MaskRay Differential Revision: https://reviews.llvm.org/D152170
75 lines
2.3 KiB
Plaintext
75 lines
2.3 KiB
Plaintext
REQUIRES: x86
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# RUN: rm -rf %t && split-file %s %t
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# RUN: llvm-mc -filetype=obj -triple=x86_64 %t/a.s -o %t/a.o
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## The error should be triggered only for the second test where the overflow really exists.
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RUN: ld.lld %t/a.o -T %t/b.lds -o /dev/null 2>&1
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RUN: not ld.lld %t/a.o -T %t/c.lds -o /dev/null 2>&1 | FileCheck --check-prefix=ERROR %s
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# ERROR: error: section '_abss' will not fit in region 'SRAM0': overflowed by 1024 bytes
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# ERROR: error: section '.c.bss' will not fit in region 'SRAM0': overflowed by 1024 bytes
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# ERROR: error: section '.text' will not fit in region 'SRAM0': overflowed by 1025 bytes
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#--- a.s
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.section .a.bss, "aw", %nobits
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.globl abss
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abss:
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.zero 0xDF0
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.size abss, 0xDF0
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.section .c.bss, "aw", %nobits
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.globl cbss
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.text
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.globl _start
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_start:
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nop
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#--- b.lds
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MEMORY
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{
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SRAM0 (rw) : ORIGIN = 0x20000400, LENGTH = 10K
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}
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SECTIONS
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{
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_abss ALIGN(REGION1__PRE_ALIGNMENT) :
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{
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REGION1__BEGIN = .; REGION1__ALIGNED_BEGIN = .; REGION1_ALIGNED_BEGIN = .;
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*(.a.bss)
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REGION1__END = .; . = ALIGN(REGION1__POST_ALIGNMENT); REGION1_ALIGNED_END = .;
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} > SRAM0
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}
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REGION1__PRE_ALIGNMENT = 0x00000800;
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REGION1__PADDED_XOR = ((ABSOLUTE(REGION1__ALIGNED_BEGIN) | (ABSOLUTE(REGION1__END) - 1)) & ~(ABSOLUTE(REGION1__ALIGNED_BEGIN) & (ABSOLUTE(REGION1__END) - 1)));
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REGION1__PADDED_REGION_SHIFT = LOG2CEIL(REGION1__PADDED_XOR);
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REGION1__PADDED_SR_SHIFT = REGION1__PADDED_REGION_SHIFT - 3;
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REGION1__PADDED_SR_SIZE = MAX(1 << REGION1__PADDED_SR_SHIFT, 32);
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REGION1__POST_ALIGNMENT = REGION1__PADDED_SR_SIZE;
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#--- c.lds
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MEMORY
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{
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SRAM0 (rw) : ORIGIN = 0x20000400, LENGTH = 4K
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}
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SECTIONS
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{
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_abss ALIGN(REGION1__PRE_ALIGNMENT) :
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{
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REGION1__BEGIN = .; REGION1__ALIGNED_BEGIN = .; REGION1_ALIGNED_BEGIN = .;
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*(.a.bss)
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REGION1__END = .; . = ALIGN(REGION1__POST_ALIGNMENT); REGION1_ALIGNED_END = .;
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} > SRAM0
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}
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REGION1__PRE_ALIGNMENT = 0x00000800;
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REGION1__PADDED_XOR = ((ABSOLUTE(REGION1__ALIGNED_BEGIN) | (ABSOLUTE(REGION1__END) - 1)) & ~(ABSOLUTE(REGION1__ALIGNED_BEGIN) & (ABSOLUTE(REGION1__END) - 1)));
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REGION1__PADDED_REGION_SHIFT = LOG2CEIL(REGION1__PADDED_XOR);
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REGION1__PADDED_SR_SHIFT = REGION1__PADDED_REGION_SHIFT - 3;
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REGION1__PADDED_SR_SIZE = MAX(1 << REGION1__PADDED_SR_SHIFT, 32);
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REGION1__POST_ALIGNMENT = REGION1__PADDED_SR_SIZE;
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