15f5971150
Adds the RISC-V ArchSpec bits contributed by @simoncook as part of D62732, plus logic to distinguish between riscv32 and riscv64 based on ELF class. The patch follows the implementation approach previously used for MIPS. It defines RISC-V architecture subtypes and inspects the ELF header, namely the ELF class, to detect the right subtype. Differential Revision: https://reviews.llvm.org/D86292
25 lines
586 B
YAML
25 lines
586 B
YAML
# RUN: yaml2obj --docnum=1 %s > %t32
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# RUN: yaml2obj --docnum=2 %s > %t64
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# RUN: lldb-test object-file %t32 | FileCheck --check-prefix=CHECK-RV32 %s
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# RUN: lldb-test object-file %t64 | FileCheck --check-prefix=CHECK-RV64 %s
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# CHECK-RV32: Architecture: riscv32--
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--- !ELF
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FileHeader:
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Class: ELFCLASS32
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Data: ELFDATA2LSB
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Type: ET_EXEC
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Machine: EM_RISCV
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...
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# CHECK-RV64: Architecture: riscv64--
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--- !ELF
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FileHeader:
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Class: ELFCLASS64
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Data: ELFDATA2LSB
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Type: ET_EXEC
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Machine: EM_RISCV
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...
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