Sivan Shani 5e688f0dbd [llvm][arm] add T1 and T2 assembly options for vlldm and vlstm ...

Re-land 634b0243b8.

T1 allow for an optional registers list,
the register list must be {d0-d15}.
T2 define a mandatory register list,
the register list must be {d0-d31}.

The requirements for T1/T2 are as follows:
                T1              T2
Require:        v8-M.Main,      v8.1-M.Main,
                secure state    secure state
16 D Regs       valid           valid
32 D Regs       UNDEFINED       valid
No D Regs       NOP             NOP

2024-03-11 14:27:28 +00:00

..

ARMDisassembler.cpp

[llvm][arm] add T1 and T2 assembly options for vlldm and vlstm

2024-03-11 14:27:28 +00:00

CMakeLists.txt

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