Files
clang-p2996/llvm/lib/Target/BPF/MCTargetDesc/BPFInstPrinter.cpp
yonghong-song 32d535195e BPF: Emit an error for illegal LD_imm64 insn when LLVM_ENABLE_ASSERTI… (#74035)
…ONS=OFF

Jose reported an issue ([1]) where for the below illegal asm code
```
  r0 = 1 + w3 ll
```
clang actually supports it and generates the object code.

Further investigation finds that clang actually intends to reject the
above code as well but only when the clang is built with
LLVM_ENABLE_ASSERTIONS=ON.

I later found that clang16 (built by redhat and centos) in fedora system
has the same issue since they also have LLVM_ENABLE_ASSERTIONS=OFF
([2]).

So let BPF backend report an error for the above case regardless of the
LLVM_ENABLE_ASSERTIONS setting.

  [1] https://lore.kernel.org/bpf/87leahx2xh.fsf@oracle.com/#t
[2]
https://lore.kernel.org/bpf/840e33ec-ea4c-4b55-bda1-0be8d1e0324f@linux.dev/

Co-authored-by: Yonghong Song <yonghong.song@linux.dev>
2023-12-07 11:29:40 -08:00

119 lines
3.5 KiB
C++

//===-- BPFInstPrinter.cpp - Convert BPF MCInst to asm syntax -------------===//
//
// Part of the LLVM Project, under the Apache License v2.0 with LLVM Exceptions.
// See https://llvm.org/LICENSE.txt for license information.
// SPDX-License-Identifier: Apache-2.0 WITH LLVM-exception
//
//===----------------------------------------------------------------------===//
//
// This class prints an BPF MCInst to a .s file.
//
//===----------------------------------------------------------------------===//
#include "BPF.h"
#include "MCTargetDesc/BPFInstPrinter.h"
#include "llvm/MC/MCAsmInfo.h"
#include "llvm/MC/MCExpr.h"
#include "llvm/MC/MCInst.h"
#include "llvm/MC/MCRegister.h"
#include "llvm/MC/MCSymbol.h"
#include "llvm/Support/Casting.h"
#include "llvm/Support/ErrorHandling.h"
#include "llvm/Support/FormattedStream.h"
using namespace llvm;
#define DEBUG_TYPE "asm-printer"
// Include the auto-generated portion of the assembly writer.
#include "BPFGenAsmWriter.inc"
void BPFInstPrinter::printInst(const MCInst *MI, uint64_t Address,
StringRef Annot, const MCSubtargetInfo &STI,
raw_ostream &O) {
printInstruction(MI, Address, O);
printAnnotation(O, Annot);
}
static void printExpr(const MCExpr *Expr, raw_ostream &O) {
const MCSymbolRefExpr *SRE;
if (const MCBinaryExpr *BE = dyn_cast<MCBinaryExpr>(Expr))
SRE = dyn_cast<MCSymbolRefExpr>(BE->getLHS());
else
SRE = dyn_cast<MCSymbolRefExpr>(Expr);
if (!SRE)
report_fatal_error("Unexpected MCExpr type.");
#ifndef NDEBUG
MCSymbolRefExpr::VariantKind Kind = SRE->getKind();
assert(Kind == MCSymbolRefExpr::VK_None);
#endif
O << *Expr;
}
void BPFInstPrinter::printOperand(const MCInst *MI, unsigned OpNo,
raw_ostream &O, const char *Modifier) {
assert((Modifier == nullptr || Modifier[0] == 0) && "No modifiers supported");
const MCOperand &Op = MI->getOperand(OpNo);
if (Op.isReg()) {
O << getRegisterName(Op.getReg());
} else if (Op.isImm()) {
O << formatImm((int32_t)Op.getImm());
} else {
assert(Op.isExpr() && "Expected an expression");
printExpr(Op.getExpr(), O);
}
}
void BPFInstPrinter::printMemOperand(const MCInst *MI, int OpNo, raw_ostream &O,
const char *Modifier) {
const MCOperand &RegOp = MI->getOperand(OpNo);
const MCOperand &OffsetOp = MI->getOperand(OpNo + 1);
// register
assert(RegOp.isReg() && "Register operand not a register");
O << getRegisterName(RegOp.getReg());
// offset
if (OffsetOp.isImm()) {
auto Imm = OffsetOp.getImm();
if (Imm >= 0)
O << " + " << formatImm(Imm);
else
O << " - " << formatImm(-Imm);
} else {
assert(0 && "Expected an immediate");
}
}
void BPFInstPrinter::printImm64Operand(const MCInst *MI, unsigned OpNo,
raw_ostream &O) {
const MCOperand &Op = MI->getOperand(OpNo);
if (Op.isImm())
O << formatImm(Op.getImm());
else if (Op.isExpr())
printExpr(Op.getExpr(), O);
else
O << Op;
}
void BPFInstPrinter::printBrTargetOperand(const MCInst *MI, unsigned OpNo,
raw_ostream &O) {
const MCOperand &Op = MI->getOperand(OpNo);
if (Op.isImm()) {
if (MI->getOpcode() == BPF::JMPL) {
int32_t Imm = Op.getImm();
O << ((Imm >= 0) ? "+" : "") << formatImm(Imm);
} else {
int16_t Imm = Op.getImm();
O << ((Imm >= 0) ? "+" : "") << formatImm(Imm);
}
} else if (Op.isExpr()) {
printExpr(Op.getExpr(), O);
} else {
O << Op;
}
}