Sergei Barannikov 5e5b656102 [MC] Make MCParsedAsmOperand::getReg() return MCRegister (#86444)

2024-03-25 05:13:48 +03:00

..

AsmParser

[MC] Make MCParsedAsmOperand::getReg() return MCRegister (#86444)

2024-03-25 05:13:48 +03:00

Disassembler

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MCTargetDesc

[RISCV][MC] Pass MCSubtargetInfo down to shouldForceRelocation and evaluateTargetFixup. (#73721)

2023-12-07 13:17:58 -08:00

TargetInfo

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CMakeLists.txt

[LoongArch|Mips|SystemZ|VE] Fix shared build. NFC

2024-02-16 11:41:52 -05:00

LVLGen.cpp

[Target] Use range-based for loops (NFC)

2022-01-23 22:53:15 -08:00

VE.h

[VE] Remove CodeGen deps from MCTargetDesc, NFC

2023-08-30 16:26:44 -07:00

VE.td

[VE] Enable vpu feature by default in llc

2023-08-15 08:32:12 +09:00

VEAsmPrinter.cpp

[MC] Use MCRegister instead of unsigned in MCInstPrinter (NFC)

2023-01-17 22:39:39 +03:00

VECallingConv.td

[VE] Correct VMP allocation in calling conv

2020-12-21 22:42:24 +09:00

VECustomDAG.cpp

[Target] llvm::Optional => std::optional

2022-12-04 22:43:14 +00:00

VECustomDAG.h

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VEFrameLowering.cpp

[Target] Use std::nullopt instead of None (NFC)

2022-12-02 20:36:06 -08:00

VEFrameLowering.h

[llvm] Use std::size instead of llvm::array_lengthof

2022-09-08 09:01:53 -06:00

VEInstrBuilder.h

[VE] Support SJLJ exception related instructions

2021-01-05 20:19:15 +09:00

VEInstrFormats.td

[VE] Fix useDeprecatedPositionallyEncodedOperands errors.

2023-01-31 19:50:26 -05:00

VEInstrInfo.cpp

[TTI] Use Register in isLoadFromStackSlot and isStoreToStackSlot [nfc] (#80339)

2024-02-01 17:52:35 -08:00

VEInstrInfo.h

[TTI] Use Register in isLoadFromStackSlot and isStoreToStackSlot [nfc] (#80339)

2024-02-01 17:52:35 -08:00

VEInstrInfo.td

[SystemZ] Don't lower ATOMIC_LOAD/STORE to LOAD/STORE (#75879)

2024-03-18 17:21:50 -04:00

VEInstrIntrinsicVL.gen.td

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VEInstrIntrinsicVL.td

[VE] Support more intrinsics

2022-03-14 19:17:15 +09:00

VEInstrPatternsVec.td

[VE] Support load/store/spill of vector mask registers

2022-07-19 10:29:21 +09:00

VEInstrVec.td

[VE] Support load/store/spill of vector mask registers

2022-07-19 10:29:21 +09:00

VEISelDAGToDAG.cpp

reland [InlineAsm] wrap ConstraintCode in enum class NFC (#66264)

2023-09-13 13:31:24 -07:00

VEISelLowering.cpp

[NFC] Remove unused variable after 94c988bc

2024-03-11 21:08:54 +00:00

VEISelLowering.h

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VEMachineFunctionInfo.cpp

llvm-reduce: Add cloning of target MachineFunctionInfo

2022-06-07 10:14:48 -04:00

VEMachineFunctionInfo.h

CodeGen: Don't lazily construct MachineFunctionInfo

2022-12-21 10:49:32 -05:00

VEMCInstLower.cpp

[Target] Use range-based for loops (NFC)

2022-01-23 22:53:15 -08:00

VERegisterInfo.cpp

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VERegisterInfo.h

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VERegisterInfo.td

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VESubtarget.cpp

Move TargetRegistry.(h|cpp) from Support to MC

2021-10-08 14:51:48 -07:00

VESubtarget.h

Remove redundant void arguments (NFC)

2022-01-02 10:20:19 -08:00

VETargetMachine.cpp

[CodeGen] Port AtomicExpand to new Pass Manager (#71220)

2024-02-25 18:42:22 +05:30

VETargetMachine.h

[NFC][CodeGen] Change CodeGenOpt::Level/CodeGenFileType into enum classes (#66295)

2023-09-14 14:10:14 -07:00

VETargetTransformInfo.h

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VVPInstrInfo.td

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VVPInstrPatternsVec.td

[VE] v512|256 f32|64 fneg isel and tests

2022-03-16 11:31:26 +01:00

VVPISelLowering.cpp

[VE] Change the way of lowering store

2023-08-18 17:13:55 +09:00

VVPNodes.def

[VE] v512|256 f32|64 fneg isel and tests

2022-03-16 11:31:26 +01:00