This PR provides implementation of the basic codegen infra such as TargetFrameLowering, MCInstLower, AsmPrinter, RegisterInfo, InstructionInfo, TargetLowering, SelectionDAGISel. Migrated from https://reviews.llvm.org/D145658
71 lines
2.3 KiB
C++
71 lines
2.3 KiB
C++
//===- XtensaAsmPrinter.cpp Xtensa LLVM Assembly Printer ------------------===//
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//
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// Part of the LLVM Project, under the Apache License v2.0 with LLVM Exceptions.
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// See https://llvm.org/LICENSE.txt for license information.
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// SPDX-License-Identifier: Apache-2.0 WITH LLVM-exception
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//
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//===----------------------------------------------------------------------===//
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//
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// This file contains a printer that converts from our internal representation
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// of machine-dependent LLVM code to GAS-format Xtensa assembly language.
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//
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//===----------------------------------------------------------------------===//
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#include "XtensaAsmPrinter.h"
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#include "TargetInfo/XtensaTargetInfo.h"
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#include "llvm/BinaryFormat/ELF.h"
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#include "llvm/CodeGen/MachineModuleInfoImpls.h"
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#include "llvm/CodeGen/TargetLoweringObjectFileImpl.h"
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#include "llvm/MC/MCExpr.h"
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#include "llvm/MC/MCSectionELF.h"
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#include "llvm/MC/MCStreamer.h"
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#include "llvm/MC/MCSymbol.h"
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#include "llvm/MC/MCSymbolELF.h"
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#include "llvm/MC/TargetRegistry.h"
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using namespace llvm;
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void XtensaAsmPrinter::emitInstruction(const MachineInstr *MI) {
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MCInst LoweredMI;
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lowerToMCInst(MI, LoweredMI);
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EmitToStreamer(*OutStreamer, LoweredMI);
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}
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MCOperand XtensaAsmPrinter::lowerOperand(const MachineOperand &MO,
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unsigned Offset) const {
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MachineOperand::MachineOperandType MOTy = MO.getType();
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switch (MOTy) {
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case MachineOperand::MO_Register:
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// Ignore all implicit register operands.
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if (MO.isImplicit())
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break;
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return MCOperand::createReg(MO.getReg());
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case MachineOperand::MO_Immediate:
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return MCOperand::createImm(MO.getImm() + Offset);
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case MachineOperand::MO_RegisterMask:
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break;
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default:
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report_fatal_error("unknown operand type");
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}
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return MCOperand();
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}
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void XtensaAsmPrinter::lowerToMCInst(const MachineInstr *MI,
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MCInst &OutMI) const {
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OutMI.setOpcode(MI->getOpcode());
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for (unsigned i = 0, e = MI->getNumOperands(); i != e; ++i) {
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const MachineOperand &MO = MI->getOperand(i);
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MCOperand MCOp = lowerOperand(MO);
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if (MCOp.isValid())
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OutMI.addOperand(MCOp);
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}
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}
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extern "C" LLVM_EXTERNAL_VISIBILITY void LLVMInitializeXtensaAsmPrinter() {
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RegisterAsmPrinter<XtensaAsmPrinter> A(getTheXtensaTarget());
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}
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