b5046a7fa9
This PR provides implementation of the basic codegen infra such as TargetFrameLowering, MCInstLower, AsmPrinter, RegisterInfo, InstructionInfo, TargetLowering, SelectionDAGISel. Migrated from https://reviews.llvm.org/D145658
28 lines
995 B
C++
28 lines
995 B
C++
//===- XtensaInstrInfo.cpp - Xtensa Instruction Information ---------------===//
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//
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// The LLVM Compiler Infrastructure
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//
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// Part of the LLVM Project, under the Apache License v2.0 with LLVM Exceptions.
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// See https://llvm.org/LICENSE.txt for license information.
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// SPDX-License-Identifier: Apache-2.0 WITH LLVM-exception
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//
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//===----------------------------------------------------------------------===//
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//
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// This file contains the Xtensa implementation of the TargetInstrInfo class.
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//
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//===----------------------------------------------------------------------===//
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#include "XtensaInstrInfo.h"
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#include "XtensaTargetMachine.h"
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#include "llvm/CodeGen/MachineConstantPool.h"
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#include "llvm/CodeGen/MachineInstrBuilder.h"
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#include "llvm/CodeGen/MachineRegisterInfo.h"
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#define GET_INSTRINFO_CTOR_DTOR
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#include "XtensaGenInstrInfo.inc"
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using namespace llvm;
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XtensaInstrInfo::XtensaInstrInfo(const XtensaSubtarget &STI)
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: XtensaGenInstrInfo(), RI(STI), STI(STI) {}
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