b5046a7fa9
This PR provides implementation of the basic codegen infra such as TargetFrameLowering, MCInstLower, AsmPrinter, RegisterInfo, InstructionInfo, TargetLowering, SelectionDAGISel. Migrated from https://reviews.llvm.org/D145658
54 lines
1.9 KiB
C++
54 lines
1.9 KiB
C++
//===-- XtensaTargetMachine.h - Define TargetMachine for Xtensa -*- C++ -*-===//
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//
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// The LLVM Compiler Infrastructure
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//
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// Part of the LLVM Project, under the Apache License v2.0 with LLVM Exceptions.
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// See https://llvm.org/LICENSE.txt for license information.
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// SPDX-License-Identifier: Apache-2.0 WITH LLVM-exception
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//
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//===----------------------------------------------------------------------===//
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//
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// This file declares the Xtensa specific subclass of TargetMachine.
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//
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//===----------------------------------------------------------------------===//
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#ifndef LLVM_LIB_TARGET_XTENSA_XTENSATARGETMACHINE_H
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#define LLVM_LIB_TARGET_XTENSA_XTENSATARGETMACHINE_H
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#include "XtensaSubtarget.h"
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#include "llvm/Target/TargetMachine.h"
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#include <optional>
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namespace llvm {
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extern Target TheXtensaTarget;
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class XtensaTargetMachine : public LLVMTargetMachine {
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std::unique_ptr<TargetLoweringObjectFile> TLOF;
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public:
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XtensaTargetMachine(const Target &T, const Triple &TT, StringRef CPU,
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StringRef FS, const TargetOptions &Options,
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std::optional<Reloc::Model> RM,
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std::optional<CodeModel::Model> CM, CodeGenOptLevel OL,
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bool JIT, bool isLittle);
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XtensaTargetMachine(const Target &T, const Triple &TT, StringRef CPU,
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StringRef FS, const TargetOptions &Options,
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std::optional<Reloc::Model> RM,
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std::optional<CodeModel::Model> CM, CodeGenOptLevel OL,
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bool JIT);
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const XtensaSubtarget *getSubtargetImpl(const Function &F) const override;
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TargetPassConfig *createPassConfig(PassManagerBase &PM) override;
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TargetLoweringObjectFile *getObjFileLowering() const override {
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return TLOF.get();
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}
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protected:
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mutable StringMap<std::unique_ptr<XtensaSubtarget>> SubtargetMap;
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};
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} // end namespace llvm
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#endif // LLVM_LIB_TARGET_XTENSA_XTENSATARGETMACHINE_H
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